DS593 Datasheet, PDF (26/35 Pages) Xilinx, Inc – Includes innovative FPGA-based acceleration

X-Ref Target - Figure 27
Platform Cable USB II
TDO setup time prior to internal sampling clock (G2 – G1)
is 42ns in this 12-MHz example.
DS593_27_011508
Figure 27: TDO Sampling Example at 12 MHz (TDO Setup Time Relative to Sampling Point)
DS593 (v1.2.1) March 17, 2011
www.xilinx.com
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