DS593 Datasheet, PDF (29/35 Pages) Xilinx, Inc – Includes innovative FPGA-based acceleration

Platform Cable USB II
X-Ref Target - Figure 30
(A)
12 Mb/s Bus Speed
1.X Root Hub
(B)
12 Mb/s Bus Speed
1.X Root Hub
(C)
480 Mb/s Bus Speed
(D)
480 Mb/s Bus Speed
(E)
480 Mb/s Bus Speed
2.0 Root Hub
2.0 Root Hub
2.0 Root Hub
500
500
500
500
500
mA
mA
mA
mA
mA
Power
Power
Platform Cable
USB II
2.0 External
Bus-Powered
Hub
2.0 External
Self-Powered
Hub
2.0 External
Self-Powered
Hub
Platform Cable
USB II
Enumerates at
full speed because
root hub only
operates at full
speed — degraded
performance due
to slow bus speed
< 500
mA
Platform Cable
USB II
< 500
mA
Platform Cable
USB II
Enumerates at
500
Hi-Speed — best
mA performance due to
high bus speed.
Platform Cable
USB II
Enumerates at
full speed because
root hub only
operates at full
speed — degraded
performance due
to slow bus speed
Enumerates at full speed
because 2.0 external
hub operates at full
speed — degraded
performance due to slow
bus speed. Cable may
not enumerate.
Enumerates at
Hi-Speed — best
performance due to
high bus speed.
Figure 30: Platform Cable USB II Performance with Various Hub Types
DS593_30_021408
Interface Pin Descriptions
Table 6: JTAG/SPI/Slave Serial Port: 2-mm Connector Signals
Pin
Number
JTAG
Configuration
MODE
SPI
Programming⁽¹⁾
Slave-Serial
Configuration
Direction⁽²⁾
2
V_REF
V_REF
V_REF
In
4
TMS
–
6
TCK
–
8
TDO
–
–
Out
–
Out
–
In
Description
Target Reference Voltage⁽³⁾. This pin
should be connected to a voltage bus on the
target system that serves the JTAG, SPI or
Slave Serial interface. For example, when
programming a CoolRunner-II device using
JTAG, V_REF should be connected to the
target V_AUX bus.
JTAG Test Mode Select. This pin is the
JTAG mode signal establishing appropriate
TAP state transitions for target ISP devices
sharing the same data stream.
JTAG Test Clock. This pin is the clock
signal for JTAG operations and should be
connected to the TCK pin on all target ISP
devices sharing the same data stream.
JTAG Test Data Out. This pin is the serial
data stream received from the TDO pin on
the last device in a JTAG chain.
DS593 (v1.2.1) March 17, 2011
www.xilinx.com
29