W83627HF Datasheet, PDF (9/185 Pages) Winbond – WINBOND I/O

W83627HF/F
PRELIMINARY
11.7.32 Temperature Sensor 2 Temperature (Low Byte) Register - Index 51h (Bank 1) ................................ 122
11.7.33 Temperature Sensor 2 Configuration Register - Index 52h (Bank 1) ................................................. 122
11.7.34 Temperature Sensor 2 Hysteresis (High Byte) Register - Index 53h (Bank 1).................................... 123
11.7.35 Temperature Sensor 2 Hysteresis (Low Byte) Register - Index 54h (Bank 1) ..................................... 123
11.7.36 Temperature Sensor 2 Over-temperature (High Byte) Register - Index 55h (Bank 1)....................... 124
11.7.37 Temperature Sensor 2 Over-temperature (Low Byte) Register - Index 56h (Bank 1) ........................ 124
11.7.38 Temperature Sensor 3 Temperature (High Byte) Register - Index 50h (Bank 2) ............................... 125
11.7.39 Temperature Sensor 3 Temperature (Low Byte) Register - Index 51h (Bank 2) ................................ 125
11.7.40 Temperature Sensor 3 Configuration Register - Index 52h (Bank 2) ................................................. 125
11.7.41 Temperature Sensor 3 Hysteresis (High Byte) Register - Index 53h (Bank 2).................................... 126
11.7.42 Temperature Sensor 3 Hysteresis (Low Byte) Register - Index 54h (Bank 2) ..................................... 126
11.7.43 Temperature Sensor 3 Over-temperature (High Byte) Register - Index 55h (Bank 2)....................... 127
11.7.44 Temperature Sensor 3 Over-temperature (Low Byte) Register - Index 56h(Bank 2) ......................... 127
11.7.45 Interrupt Status Register 3 -- Index 50h (BANK4)................................................................................ 128
11.7.46 SMI# Mask Register 3 -- Index 51h (BANK 4) ..................................................................................... 128
11.7.47 Reserved Register -- Index 52h (Bank 4) ............................................................................................... 128
11.7.48 BEEP Control Register 3-- Index 53h (Bank 4) .................................................................................... 129
11.7.49 Temperature Sensor 1 Offset Register -- Index 54h (Bank 4) .............................................................. 129
11.7.50 Temperature Sensor 2 Offset Register -- Index 55h (Bank 4) .............................................................. 130
11.7.51 Temperature Sensor 3 Offset Register -- Index 56h (Bank 4) .............................................................. 130
11.7.52 Reserved Register -- Index 57h--58h...................................................................................................... 130
11.7.53 Real Time Hardware Status Register I -- Index 59h (Bank 4) ............................................................. 131
11.7.54 Real Time Hardware Status Register II -- Index 5Ah (Bank 4)............................................................ 131
11.7.55 Real Time Hardware Status Register III -- Index 5Bh (Bank 4) .......................................................... 132
11.7.56 Reserved Register -- Index 5Ch-5Dh (Bank 4) ...................................................................................... 133
11.7.57 Value RAM 2¾ Index 50h - 5Ah (auto-increment) (BANK 5) .............................................................. 133
11.7.58 Winbond Test Register -- Index 50h (Bank 6) ....................................................................................... 133
12. SERIAL IRQ .......................................................................................................................134
12.1 START FRAME................................................................................................................................................ 134
12.2 IRQ/DATA FRAME......................................................................................................................................... 134
12.3 STOP FRAME .................................................................................................................................................. 135
13. CONFIGURATION REGISTER....................................................................................136
13.1 CHIP (GLOBAL) CONTROL REGISTER ................................................................................................... 136
13.2 LOGICAL DEVICE 0 (FDC).......................................................................................................................... 142
13.3 LOGICAL DEVICE 1 (PARALLEL PORT) ................................................................................................. 145
Publication Release Date:Sep 1998
-VI -
Revision 0.50