W83627HF Datasheet, PDF (178/185 Pages) Winbond – WINBOND I/O

W83627HF/F
PRELIMINARY
Bit 1: FSLEEP: This bit selects the fast expiry time of individual devices.
= 0 1 second.
= 1 8 milli-seconds.
Bit 0: SMIPME_OE: This is the SMI and PME output enable bit.
= 0 neither SMI nor PME will be generated. Only the IRQ status bit is set.
= 1 an SMI or PME event will be generated.
CRFE, FF (Default 0x00)
Reserved for Winbond test.
13.12 Logical Device B (Hardware Monitor)
CR30 (Default 0x00)
Bit 7 - 1: Reserved.
Bit 0: = 1 Activates the logical device.
= 0 Logical device is inactive.
CR60, CR 61 (Default 0x00, 0x00)
These two registers select Hardware Monitor base address [0x100:0xFFF] on 8-byte boundary.
CR70 (Default 0x00)
Bit 7 - 4: Reserved.
Bit 3 - 0: These bits select IRQ resource for Hardware Monitor.
CRF0 (Default 0x00)
Bit 7 - 1: Reserved.
Bit 0: Disable initial abnormal beep (VcoreA and +3.3 V)
= 0 Enable power-on abnormal beep
= 1 Disable power-on abnormal beep
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Publication Release Date: Jul 1999
Revision 0.53