W83627HF Datasheet, PDF (5/185 Pages) Winbond – WINBOND I/O

W83627HF/F
PRELIMINARY
3.1.7 FDC Commands ............................................................................................................................................23
3.2 REGISTER DESCRIPTIONS..............................................................................................................................34
3.2.1 Status Register A (SA Register) (Read base address + 0)...........................................................................34
3.2.2 Status Register B (SB Register) (Read base address + 1)...........................................................................36
3.2.3 Digital Output Register (DO Register) (Write base address + 2) ..............................................................38
3.2.4 Tape Drive Register (TD Register) (Read base address + 3) .....................................................................38
3.2.5 Main Status Register (MS Register) (Read base address + 4) ...................................................................39
3.2.6 Data Rate Register (DR Register) (Write base address + 4) ......................................................................39
3.2.7 FIFO Register (R/W base address + 5) ........................................................................................................41
3.2.8 Digital Input Register (DI Register) (Read base address + 7) ...................................................................43
3.2.9 Configuration Control Register (CC Register) (Write base address + 7) .................................................44
4. UART PORT...........................................................................................................................45
4.1 UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER (UART A, UART B) ............................45
4.2 REGISTER ADDRESS ........................................................................................................................................45
4.2.1 UART Control Register (UCR) (Read/Write)................................................................................................45
4.2.2 UART Status Register (USR) (Read/Write) ...................................................................................................47
4.2.3 Handshake Control Register (HCR) (Read/Write) ......................................................................................48
4.2.4 Handshake Status Register (HSR) (Read/Write)..........................................................................................49
4.2.5 UART FIFO Control Register (UFR) (Write only) ......................................................................................50
4.2.6 Interrupt Status Register (ISR) (Read only) .................................................................................................51
4.2.7 Interrupt Control Register (ICR) (Read/Write) ............................................................................................52
4.2.8 Programmable Baud Generator (BLL/BHL) (Read/Write)........................................................................52
4.2.9 User-defined Register (UDR) (Read/Write)..................................................................................................53
5. CIR RECEIVER PORT ........................................................................................................54
5.1 CIR REGISTERS ...................................................................................................................................................54
5.1.1 Bank0.Reg0 - Receiver Buffer Registers (RBR) (Read)................................................................................54
5.1.2 Bank0.Reg1 - Interrupt Control Register (ICR) ...........................................................................................54
5.1.3 Bank0.Reg2 - Interrupt Status Register (ISR)...............................................................................................54
5.1.4 Bank0~3.Reg3 - CIR Control Register 0/Bank Select Register (CTR0/BSR) (BANK0~3)........................55
5.1.5 Bank0.Reg4 - CIR Control Register (CTR)...................................................................................................55
5.1.6 Bank0.Reg5 - UART Line Status Register (USR) ........................................................................................56
5.1.7 Bank0.Reg6 - Remote Infrared Config Register (RIR_CFG) ......................................................................57
5.1.8 Bank0.Reg7 - User Defined Register (UDR/AUDR)....................................................................................58
5.1.9 Bank1.Reg0~1 - Baud Rate Divisor Latch (BLL/BHL) ...............................................................................59
5.1.10 Bank1.Reg2 - Version ID Regiister I (VID) ...............................................................................................60
Publication Release Date:Sep 1998
-II -
Revision 0.50