W83627HF Datasheet, PDF (177/185 Pages) Winbond – WINBOND I/O

W83627HF/F
PRELIMINARY
CRF7 (Default 0x00)
Bit 7 - 6: Reserved. Return zero when read.
Bit 5 - 0: Enable bits of the SMI /PME generation due to the GPIO IRQ function or device's IRQ.
Bit 5: HMIRQEN.
= 0 disable the generation of an SMI /PME interrupt due to hardware monitor's IRQ.
= 1 enable the generation of an SMI / PME interrupt due to hardware monitor's IRQ.
Bit 4: WDTIRQEN.
= 0 disable the generation of an SMI /PME interrupt due to watch dog timer's IRQ.
= 1 enable the generation of an SMI / PME interrupt due to watch dog timer's IRQ.
Bit 3: CIRIRQEN.
= 0 disable the generation of an SMI /PME interrupt due to CIR's IRQ.
= 1 enable the generation of an SMI /PME interrupt due to CIR's IRQ.
Bit 2: MIDIIRQEN.
= 0 disable the generation of an SMI /PME interrupt due to MIDI's IRQ.
= 1 enable the generation of an SMI /PME interrupt due to MIDI's IRQ.
Bit 1: IRQIN1EN.
= 0 disable the generation of an SMI /PME interrupt due to IRQIN1's IRQ.
= 1 enable the generation of an SMI / PME interrupt due to IRQIN1's IRQ.
Bit 0: IRQIN0EN.
= 0 disable the generation of an SMI /PME interrupt due to IRQIN0's IRQ.
= 1 enable the generation of an SMI / PME interrupt due to IRQIN0's IRQ.
CRF9 (Default 0x00)
Bit 7 - 3: Reserved. Return zero when read.
Bit 2: PME_EN: Select the power management events to be either an PME or SMI interrupt for
the IRQ events. Note that: this bit is valid only when SMIPME_OE = 1.
= 0 the power management events will generate an SMI event.
= 1 the power management events will generate an PME event.
- 159 -
Publication Release Date: Jul 1999
Revision 0.53