W632GU6KB Datasheet, PDF (85/160 Pages) Winbond – 16M X 8 BANKS X 16 BIT DDR3L SDRAM

W632GU6KB
CK#
CK
Address
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10
T11
T12
T13
NOP
NOP
NOP
NOP
ODTH4
WRS4
VALID
NOP
NOP
ODTH4
NOP
NOP
NOP
NOP
NOP
NOP
NOP
ODT
RTT
DQS, DQS#
DQ
ODTLon
tAONmin
ODTLcwn4
Rtt_Nom
tAONmax
ODTLcnw
tADCmin
tADCmax
Rtt_WR
tADCmin
tADCmax
Rtt_Nom
Din Din Din Din
b b+1 b+2 b+3
WL
NOTES: Example for BC4 (via MRS or OTF), AL = 0, CWL = 5. ODTH4 applies to first registering ODT high and to the registration of the Write command.
In this example, ODTH4 would be satisfied if ODT went low at T8 (4 clocks after the Write command).
T14
T15
T16
T17
NOP
NOP
NOP
NOP
ODTLoff
tAOFmin
tAOFmax
TRANSITIONING
DON'T CARE
Figure 77 – Dynamic ODT: Behavior with ODT being asserted before and after the write
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Publication Release Date: Jan. 20, 2015
Revision: A06