W632GU6KB Datasheet, PDF (38/160 Pages) Winbond – 16M X 8 BANKS X 16 BIT DDR3L SDRAM

W632GU6KB
T0
CK#
CK
Ta
Tb0
Tb1
Command
PREA
MRS
READ^*1
NOP
tRP
tMOD
BA
3
VALID
Tc0
NOP
Tc1
NOP
Tc2
NOP
Tc3
NOP
Tc4
NOP
Tc5
NOP
Tc6
Tc7
NOP
MRS
tMPRR
3
Tc8
Tc9
Td
NOP
NOP
tMOD
VALID
A[1:0]
0
0^*2
VALID
A[2]
1
0^*2
0
A[9:3]
00
VALID
00
A10/AP
1
0
VALID
0
A[11]
0
VALID
0
A12/BC#
DQS, DQS#
DQ
0
VALID^*1
RL
NOTES: 1. RD with BL8 either by MRS or on the fly.
2. Memory Controller must drive 0 on A[2:0].
0
TIME BREAK
DON'T CARE
Figure 17 – MPR Readout of pre-defined pattern, BL8 fixed burst order, single readout
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Publication Release Date: Jan. 20, 2015
Revision: A06