W632GU6KB Datasheet, PDF (150/160 Pages) Winbond – 16M X 8 BANKS X 16 BIT DDR3L SDRAM

W632GU6KB
Table 51 – Derating values DDR3L-1866 tIS/tIH - AC/DC based Alternate AC125 Threshold
CMD/
ADD
Slew
rate
(V/nS)
ΔtIS, ΔtIH derating in [pS] AC/DC based
Alternate AC125 Threshold -> VIH(AC)=VREF(DC)+125mV, VIL(AC)=VREF(DC)-125mV
CK, CK# Differential Slew Rate
4.0 V/nS
3.0 V/nS
2.0 V/nS
1.8 V/nS
1.6 V/nS
1.4 V/nS
1.2 V/nS
1.0 V/nS
ΔtIS ΔtIH ΔtIS ΔtIH ΔtIS ΔtIH ΔtIS ΔtIH ΔtIS ΔtIH ΔtIS ΔtIH ΔtIS ΔtIH ΔtIS ΔtIH
2.0 63 45 63 45 63 45 71 53 79 61 87 69 95 79 103 95
1.5 42 30 42 30 42 30 50 38 58 46 66 54 74 64 82 80
1.0
0
0
0
0
0
0
8
8 16 16 24 24 32 34 40 50
0.9
3 -3 3 -3 3 -3 11 5 19 13 27 21 35 31 43 47
0.8
6 -8 6 -8 6 -8 14 1 22 9 30 17 38 27 46 43
0.7 10 -13 10 -13 10 -13 18 -5 26 3 34 11 42 21 50 37
0.6 16 -20 16 -20 16 -20 24 -12 32 4 40 -4 48 14 56 30
0.5 15 -30 15 -30 15 -30 23 -22 31 -14 39 -6 47 4 55 20
0.4 13 -45 13 -45 13 -45 21 -37 29 -29 37 -21 45 -11 53 5
Table 52 – Required time tVAC above VIH(AC) {below VIL(AC)} for valid ADD/CMD transition
Slew Rate
[V/nS]
DDR3L-1333/1600
tVAC @ 160mV [pS] tVAC @ 135mV [pS]
Min.
Max.
Min.
Max.
DDR3L-1866
tVAC @ 135mV [pS] tVAC @ 125mV [pS]
Min.
Max.
Min.
Max.
> 2.0
2.0
200
-
213
-
200
-
205
-
200
-
213
-
200
-
205
-
1.5
173
-
190
-
178
-
184
-
1.0
120
-
145
-
133
-
143
-
0.9
102
-
130
-
118
-
129
-
0.8
80
-
111
-
99
-
111
-
0.7
51
-
87
-
75
-
89
-
0.6
13
-
55
-
43
-
59
-
0.5
Note
-
10
-
Note
-
18
-
< 0.5
Note
-
10
Note
-
18
-
Note: Rising input signal shall become equal to or greater than VIH(AC) level and Falling input signal shall become equal to or
less than VIL(AC) level.
- 150 -
Publication Release Date: Jan. 20, 2015
Revision: A06