W89C926 Datasheet, PDF (45/48 Pages) Winbond – PCMCIA ETHERNET NETWORK TWISTED PAIR INTERFACE CONTROLLER

W89C926 PENTIC+
Output Load
0.1 µF
Input
Vcc
DEVICE
UNDER
TEST
SW1 (Note 3)
RL = 2.2K
Output
CL (Note 1, 2)
Notes:
1. Load capacitance employed depends on output type:
For 3SL, MOS, TPI, AUI: CL = 50 pF
For 3SH, OCH: CL = 240 pF
2. Specifications which measure delays from an active state to a High-Z state are not guaranteed by production testing, but are
characterized using 240 pF and are correlated to determine true driver turn-off time by eliminating inherent R-C delay
times in
measurements.
3. SW1 = Open for push-pull outputs during timing test.
SW1 = VCC for VOL test.
SW1 = GND for VOH test.
SW1 = VCC for High-Z to active low and active low to High-Z measurements.
SW1 = GND for High-Z to active high and active high to High-Z measurements.
Pin Capacitance
TA = 25° C, f = 1 MHz
SYMBOL
CIN
COUT
PARAMETER
Input Capacitance
Output Capacitance
TYP
7
10
UNIT
pF
pF
Derating Factor
Output timing is measured with a purely capacitive load of 50 pF or 240 pF. The following correction
factor can be used for other loads (this factor is preliminary):
Derating for 3SL, MOS = -0.05 nS/pF
Derating for 3SH, OCL, TPI = -0.03 nS/pF
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Publication Release Date: January 1996
Revision A1