W89C926 Datasheet, PDF (39/48 Pages) Winbond – PCMCIA ETHERNET NETWORK TWISTED PAIR INTERFACE CONTROLLER

W89C926 PENTIC+
PCMCIA Bus Slave Access
SYMBOL
DESCRIPTION
T1a _{HA0-16 & REG valid to OE , WE asserted Note 2}
T1b _{HA0-16 & REG valid to IORD, IOWR asserted.}
Note 3
T2a _{CE1,2 asserted to OE, WE asserted.}
T2b _{CE1,2 asserted to IORD, IOWR asserted.}
T3a _{HA0-16 valid to OE, WE asserted.}
T3b _{HA0-16 valid to IORD, IOWR asserted.}
T4
HA0-16 valid to IOIS16 asserted.
Note 4
T5
OE, WE, IORD, IOWR asserted to WAIT asserted.
Note 1
T6
IORD asserted to INPACK asserted.
Note 8
T7a
IORD asserted to HD0-15 read data valid. Note 6
T7b
OE asserted to HD0-15 read data valid. Note 9
T8
IORD, IOWR minimum width time.
T9a _{WAIT deasserted to HD0-15 memory read data}
valid.
Note 1, 5
T9b _{WAIT deasserted to HD0-15 I/O read data valid.}
Note 1, 5
T10 _{HD0-15 read data hold after OE, IORD deasserted.}
T11 _{HD0-15 write data setup before WE deasserted.}
T12 _{HD0-15 write data setup befor IOWR assert.}
T13a _{HD0-15 write data hold after WE deasserted.}
T13b _{HD0-15 write data hold after IOWR deasserted.}
T14a _{OE , WE deasserted to REG deasserted. Note 7}
T14b
IORD, IOWR deasserted to REG deasserted.
Note 7
T15a _{OE, WE deasserted to CE1,2 deasserted.}
T15b _{IORD, IOWR deasserted to CE1,2 deasserted.}
T16a _{OE, WE deasserted to HA0-16 deasserted.}
MIN.
10
5
0
5
10
70
-
-
-
-
-
165
-
-
5
40
60
15
30
15
0
15
20
15
MAX.
-
-
-
-
-
-
35
35
40
100
50
-
0
0
-
-
-
-
-
-
-
-
-
-
UNIT
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
- 39 -
Publication Release Date: January 1996
Revision A1