VSC7212 Datasheet, PDF (29/34 Pages) Vitesse Semiconductor Corporation – Gigabit Interconnect Chip

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Preliminary Data Sheet
VSC7212
Gigabit Interconnect Chip
Table 16: Pin Identification
Pin
99,98,97
96,95,91
90,89
88
87
92
86
85
82
81
73
4
5
9
10
2
7
46,48,52
53,55,56
58,60
68
65
Name I/O Type
Pin Description
T0, T1, T2
T3, T4, T5 I
T6, T7
TTL Transmit data, synchronous to REFCLK or TBC.
Control/Data. If KCHAR=C/D=LOW, then T(7:0) is used to generate
transmit data. If KCHAR=C/D=HIGH then special Kxx.x characters are
C/D
I
TTL transmitted based upon the value of T(7:0). If KCHAR=LOW and C/D
=HIGH, IDLE characters are transmitted.
When ENDEC=LOW, this is equivalent to data bit T8.
WSEN
Word Sync ENable. Asserted HIGH for one cycle to initiate transmission of
I
TTL the Word Sync Sequence as defined in Figure 5 and related text.
When ENDEC=LOW, this is equivalent to data bit T9.
TBC
I
TTL
Transmit Byte Clock. Optional input data timing reference for T(7:0),
WSEN and C/D.
Special Kxx.x CHARacter Enable. When C/D is HIGH, KCHAR controls
data sent to the transmitter. When LOW, IDLE characters are sent. When
HIGH, Kxx.x special characters are sent as encoded on T(7:0). This is
KCHAR
I
TTL intended to be a static input and cannot be changed on a cycle-by-cycle
basis.
When ENDEC=LOW, this is equivalent to ENCDET. A HIGH enables
comma detection and alignment. A LOW disables both.
TMODE0
TMODE1 I
TMODE2
TTL
Transmit Input Data Timing MODE. Determines the timing reference for
T(7:0), WSEN and C/D as defined in Table 1.
TBERR
Transmit Buffer ERRor. When HIGH indicates that the elastic limit of the
O
TTL
transmit input skew buffer was exceeded, output timing is same as R(7:0). A
LOW indicates correct reception of the 256-byte incrementing pattern in
BIST mode.
PTX+
PTX-
O
PECL
Primary Differential Serial TX Output. These pins output serialized
transmit data when PTXEN is HIGH. AC-coupling is recommended.
RTX+
RTX-
O
PECL
Redundant Differential Serial TX output. These pins output serialized
transmit data when RTXEN is HIGH. AC-coupling is recommended.
PTXEN
I
TTL
Primary TX Output ENable. When HIGH, PTX+/- is active, when LOW
PTX+/- is powered down and the outputs are un-driven.
RTXEN
I
TTL
Redundant TX Output ENable. When HIGH RTX+/- is active, when LOW
RTX+/- is powered down and the outputs are un-driven.
R0, R1, R2
R3, R4, R5 O
R6, R7
TTL
Receive Data. Synchronous to RCLK/RCLKN or REFCLK as selected by
RMODE(1:0).
IDLE
IDLE Detect. When HIGH, an IDLE character has been detected by the
O TTL decoder and is on R(7:0)
When ENDEC=LOW, this is equivalent to COMDET.
KCH
Kxx.x CHaracter Detect. When HIGH, a special Kxx.x character has been
O TTL detected by the decoder and is on R(7:0).
When ENDEC=LOW, this is equivalent to data bit R8.
G52268-0, Rev 3.3
04/10/01
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