TA1317AFG Datasheet, PDF (45/58 Pages) Toshiba Semiconductor – Deflection Processor IC for TV

Note
No.
Parameter
29 Horizontal DF phase
adjustment (H DF phase)
TA1317AFG
SW6
OFF
SW7
B
SW8
ON
Test Condition
SW Mode
SW10 SW13 SW14 SW21 SW30
Test Method
(unless otherwise specified, V_CC = 9 V, Ta = 25 ± 3°C, data = preset values)
OFF B
ON
A
A (1) Input horizontal trigger pulse (figure below) to pin 15 (FBP IN).
Pulse level (HT) = 4.0 V
(2) Set H-DF CURVE (sub-address: 08) to maximum (data: F0).
(3) Set H-DF PHASE (sub-address: 07) to minimum (data: 08) and measure pin 20
(H-DF OUT) phase T_HD (08).
(4) Set H-DF PHASE (sub-address: 07) to maximum (data: F8) and measure pin 20
(H-DF OUT) phase T_HD (F8).
(5) Calculate change amount T_HD using the following formula.
T_HD (08) T_HD (F8)
Pin 20 (H-DF OUT)waveform
T_HD = T_HD (08) + T_HD (F8)
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2005-08-18