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TA1317AFG Datasheet, PDF (40/58 Pages) Toshiba Semiconductor – Deflection Processor IC for TV
Note
No.
Parameter
22 EW trapezium correction
change amount
TA1317AFG
SW6
OFF
SW7
B
SW8
ON
Test Condition
SW Mode
SW10 SW13 SW14 SW21 SW30
Test Method
(unless otherwise specified, VCC = 9 V, Ta = 25 ± 3°C, data = preset values)
OFF B
ON
A
A (1) Input vertical trigger pulse to pin VIN.
Pulse level (VT) = 3.0 V
(2) Apply external power supply (DC voltage = 7 V) to pin 3 (EHT IN).
(3) Set EW PARABOLA (sub-address: 0A) to maximum (data: 3F).
(4) Set EW TRAPEZIUM (sub-address: 0B) to minimum (data: 00) and measure Pin 13
(EW FD) phase VET (00).
(5) Set EW TRAPEZIUM (sub-address: 0B) to maximum (data: FE) and measure Pin
13 (EW FD) phase VET (FE).
(6) Calculate change amounts VETP and VETN using the following formulas.
VET (FE) VET (00)
Pin 13 (EW FD) waveform
VET (FE)
VETP =
× 100
20
VET (00)
VETN =
× 100
20
40
2005-08-18