TA1317AFG Datasheet, PDF (34/58 Pages) Toshiba Semiconductor – Deflection Processor IC for TV

Note
No.
Parameter
14 Vertical EHT compensation
(V EHT compensation)
change amount
15 EHT input dynamic range
TA1317AFG
SW6
OFF
OFF
SW7
B
B
SW8
ON
Test Condition
SW Mode
SW10 SW13 SW14 SW21 SW30
Test Method
(unless otherwise specified, V_CC = 9 V, Ta = 25 ± 3°C, data = preset values)
OFF B
ON
A
A (1) Input vertical trigger pulse to pin V_IN.
Pulse level (VT) = 3.0 V
(2) Set VD (sub-address: 00) to AC-Coupling mode (data: 81).
(3) Set V SHIFT (sub-address: 01) data to 82.
(4) Connect external power supply (DC voltage = 0 V) to pin 3 (EHT IN).
(5) Set V-EHT COMPENSATION (sub-address: 02) to minimum (data: 80) and
measure Pin 7 (V NF) amplitude V_E (80).
(6) Set V-EHT COMPENSATION (sub-address: 02) to maximum (data: 87) and
measure Pin 7 (V NF) amplitude V_E (87).
(7) Calculate change amount V_EHT using the following formula.
V_E (80) − V_E (87)
V_EHT =
× 100
V_E (87)
ON OFF B
ON
A
A (1) Input vertical trigger pulse to pin V_IN.
Pulse level (VT) = 3.0 V
(2) Set VD (sub-address: 00) to AC-Coupling mode (data: 81).
(3) Set V SHIFT (sub-address: 01) data to 82.
(4) Connect external power supply V₃ to pin 3 (EHT IN).
(5) Set V-EHT COMPENSATION (sub-address: 02) to maximum (data: 87).
(6) Change external power supply V₃ from 1 to 7 V and monitor Pin 7 (V NF)
amplitude.
(7) When Pin 7 (V NF) amplitude changes, measure V₃ voltages V_EHL and V_EHH.
V_EHL
V_EHH ^{Voltage applied to pin 3 (EHT IN) (V3)}
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2005-08-18