TA1317AFG Datasheet, PDF (27/58 Pages) Toshiba Semiconductor – Deflection Processor IC for TV

TA1317AFG
Note
No.
Parameter
7 Vertical phase adjustment 1
(V shift) change amount
SW6
OFF
SW7
B
SW8
ON
Test Condition
SW Mode
SW10 SW13 SW14 SW21 SW30
Test Method
(unless otherwise specified, V_CC = 9 V, Ta = 25 ± 3°C, data = preset values)
OFF B
ON
A
A (1) Input vertical trigger pulse to pin V_IN.
Pulse level (VT) = 3.0 V
(2) Set VD (sub-address: 00) to AC-Coupling mode (data: 81).
(3) Set V INTEGRAL CORRECTION (sub-address: 08) to center (data: 88).
(4) Set V S CORRECTION (sub-address: 09) to center (data: A0).
(5) Set V SHIFT (sub-address: 01) to minimum (data: 80) and measure V_DC (80) as
shown in the figure below.
(6) Set V SHIFT (sub-address: 01) to maximum (data: 83) and measure V_DC (83) as
shown in the figure below.
(7) Calculate change amount V_DC using the following formula.
Pin 7
(V NF) waveform
V_DC (83)
V_DC (80)
V_DC = V_DC (83) − V_DC (80)
10 ms
10 ms
27
2005-08-18