TA1317AFG Datasheet, PDF (31/58 Pages) Toshiba Semiconductor – Deflection Processor IC for TV

TA1317AFG
Note
No.
11
Parameter
Vertical symmetry
(V symmetry) change amount
SW6
OFF
SW7
B
SW8
ON
Test Condition
SW Mode
SW10 SW13 SW14 SW21 SW30
Test Method
(unless otherwise specified, V_CC = 9 V, Ta = 25 ± 3°C, data = preset values)
OFF B
ON
A
A (1) Input vertical trigger pulse to pin V_IN.
Pulse level (VT) = 3.0 V
(2) Set VD (sub-address: 00) to AC-Coupling mode (data: 81).
(3) Set V INTEGRAL CORRECTION (sub-address: 08) to center (data: 88).
(4) Set V S CORRECTION (sub-address: 09) to center (data: A0).
(5) Set V SHIFT (sub-address: 01) data to 82.
(6) Set V SYMMETRY (sub-address: 11) to minimum (data: 00) and measure Pin 7 (V
NF) voltage V_VT (00).
(7) Set V SYMMETRY (sub-address: 11) to maximum (data: FF) and measure Pin 7 (V
NF) voltage V_VT (FF).
(8) Calculate change amount V_VT using the following formula.
Pin 7
V_VT (FF)
(V NF) waveform
V_VT (00)
V_VT = V_VT (FF) − V_VT (00)
10 ms
10 ms
31
2005-08-18