TA1317AFG Datasheet, PDF (24/58 Pages) Toshiba Semiconductor – Deflection Processor IC for TV

TA1317AFG
Test Condition
Note
No.
Parameter
1 Vertical trigger input shaped
voltage
SW6
OFF
SW7
B
SW8
ON
Test Condition
SW Mode
SW10 SW13
OFF B
SW14
ON
SW21
A
SW30
Test Method
(unless otherwise specified, V_CC = 9 V, Ta = 25 ± 3°C, data = preset values)
A (1) Input vertical trigger pulse (figure below) to pin V_IN.
(2) Increase vertical trigger pulse level (VT) from 0 V_P-P. When timing pulse is output to
pin 28 (TC FILTER), measure vertical trigger pulse level V_TH.
Vertical cycle = 20 ms
2 Timing pulse output voltage OFF B
ON OFF B
ON
A
Vertical trigger pulse
640 µs
Pulse level (VT)
0V
A (1) Input vertical trigger pulse to pin V_IN.
Pulse level (VT) = 3.0 V
(2) Measure pin 28 (TC FILTER) voltages (V_TCH, V_TCM, V_TCL) as shown in the figure
below.
Pin 28
(TC FILTER) waveform
V_TCH
V_TCM
V_TCL
Pin 29
(V-RAMP FILTER) waveform
24
2005-08-18