TC94A04AFG Datasheet, PDF (35/42 Pages) Toshiba Semiconductor – 1 chip Audio Digital Processor

Microcontroller Interface
(1) Standard transmission mode ( CS , IFCK, IFDI, IFDO)
TC94A04AFG/AFDG
Characteristics
Standby time
CS ↓-IFCK ↓ setup time
IFCK “L” cycle width
IFCK “H” cycle width
IFCK ↑- CS ↑ setup time
CS “H” cycle width
IFDI-IFCK ↑ setup time
IFCK ↑-IFDI holed time
IFCK ↓-IFDO propagation delay time
Symbol
Test
Circuit
Test Condition
Min Typ. Max Unit
t_STB
⎯
⎯
1.0
⎯
⎯
µs
t_CCD
⎯
⎯
0.2
⎯
⎯
µs
t_WLC
⎯
⎯
0.25 ⎯
⎯
µs
t_WHC
⎯
⎯
0.25 ⎯
⎯
µs
t_CKC
⎯
⎯
0.25 ⎯
⎯
µs
t_WCS
⎯
(Note 16) 0.5
⎯
⎯
µs
t_SCD
⎯
⎯
0.2
⎯
⎯
µs
t_HCD
⎯
⎯
0.2
⎯
⎯
µs
t_DDO
⎯ C_L = 30 pF
⎯
⎯
0.2
µs
Note 16: The command which is “Sync” in the transfer Sync with Sync signal of a 14 page table 1 control command
table needs to set the CS = H section to a minimum of 1 fs more until it transmits the follwing command.
(It needs more than 22.68 µs at fs = 44.1 KHz.)
(2) I²C mode ( CS , IFCK, IFDI)
Characteristics
IFCK clock frequency
IFCK “H” cycle width
IFCK “L” cycle width
Data setup time
Data hold time
Transmission start condition hold time
Repeat transmission start setup time
Transmission end condition
setup time
Data transmission interval
I²C rising time
I²C falling time
Symbol
t_IFCK
t_H
t_L
t_DS
t_DH
t_SCH
t_SCS
t_ECS
t_BUF
t_R
t_F
Test
Circuit
Test Condition
⎯ C_L = 400 pF
⎯ C_L = 400 pF
⎯ C_L = 400 pF
⎯ C_L = 400 pF
⎯ C_L = 400 pF
⎯ C_L = 400 pF
⎯ C_L = 400 pF
⎯ C_L = 400 pF
⎯ C_L = 400 pF
⎯ C_L = 400 pF
⎯ C_L = 400 pF
Min Typ. Max Unit
0
⎯ 400 kHz
0.6
⎯
⎯
µs
1.3
⎯
⎯
µs
0.1
⎯
⎯
µs
0
⎯
⎯
µs
0.6
⎯
⎯
µs
0.6
⎯
⎯
µs
0.6
⎯
⎯
µs
1.3
⎯
⎯
µs
⎯
⎯
0.3
µs
⎯
⎯
0.3
µs
35
2005-09-28