TC94A04AFG Datasheet, PDF (34/42 Pages) Toshiba Semiconductor – 1 chip Audio Digital Processor

Timing
Clock Input Pin (XI)
Characteristics
Clock cycle
Clock “H” cycle width
Clock “L” cycle width
TC94A04AFG/AFDG
Symbol
t_XI
t_XIH
t_XIL
Test
Circuit
⎯
⎯
⎯
Test Condition
⎯
⎯
⎯
Min Typ. Max Unit
27
⎯
⎯
ns
⎯ 13.5 ⎯
ns
⎯ 13.5 ⎯
ns
Reset Pin ( _RST )
Characteristics
Standby time
Reset pulse width
Symbol
t_RRS
t_WRS
Test
Circuit
⎯
⎯
Test Condition
⎯
⎯
Min Typ. Max Unit
10
⎯
⎯
ms
1.0
⎯
⎯
µs
Audio Serial Interface (EBCI/O, ELRI/O, DIN0 to 2, DOUT)
Characteristics
ELRI/O hold time
(ELRI/O input)
DIN 0, 1, 2 setup time
DIN 0, 1, 2 hold time
EBCI/O
clock cycle
EBCI/O clock
“H” cycle width
(ELRI/O input)
EBCI/O clock
“L” clock width
ELRI/O output delay time
(ELRI/O output)
DOUT output delay time (1)
DOUT output delay time (2)
Symbol
Test
Circuit
Test Condition
t_LIH
⎯
t_SDI
t_HDI
t_EBCI
t_EBIH
⎯
⎯
Unless than fs = 48 kHz,
⎯ _{EBCI/O input: Unless than 64}
fs
⎯
t_EBIL
⎯
t_LOH
t_DO1
t_DO2
⎯ C_L = 30 pF
⎯ C_L = 30 pF
⎯ C_L = 30 pF
Min Typ. Max Unit
−75 ⎯
75
ns
50
⎯
⎯
ns
50
⎯
⎯
ns
150 ⎯
⎯
ns
75
⎯
⎯
ns
75
⎯
⎯
ns
0
⎯
60
ns
⎯
⎯
35
ns
⎯
⎯
35
ns
34
2005-09-28