TC94A04AFG Datasheet, PDF (14/42 Pages) Toshiba Semiconductor – 1 chip Audio Digital Processor

TC94A04AFG/AFDG
3. Control Commands
The following table lists the control commands that can be used from the microcontroller.
3.1 Control-Command Table
Table 1 Control commands
Command
TIMING
BOOT
DIN/AIN
DOUT/AOUT
RUN-MUTE
MSEQ
CRAM
CRAM-ACMP
ORAM
ORAM-ACMP
IFF
DE-EMPH
DAC-LR
DAC-CS
DF-ATT
M-RST
Code
40h
41h
42h
43h
44h
45h
46h
47h
48h
49h
4Ah
4Bh
4Ch
4Dh
4Eh
4Fh
R/W
Description
Timing
Self boot ROM start address
Setting digital/analog input
Setting digital/analog output
Program execution, mute
Sequential RAM
CRAM
CRAM (ACMP mode)
W
ORAM
ORAM (ACMP mode)
IFF setting
De-emphasis
DAC output trim level (L/R-ch)
DAC output trim level (C/S-ch)
DF attenuator level (all ch)
Initialization
RAM
Sequential
⎯
⎯
⎯
⎯
⎯
⎯
Enable
⎯
⎯
⎯
⎯
⎯
⎯
Transfer Sync/Async
to SYNC Signal
Async
Async
Async
Async
Sync
Sync: RUN, Async: STOP
Async
Sync: RUN, Async: STOP
Async
Sync
Sync
Sync
Sync
Async
Async
Note 4: The command which is “Sync” in the transfer Sync with Sync signal needs to set the CS = H section to a
minimum of 1 fs more until it transmits the follwing command. (It need more than 22.68 µs at fs = 44.1 KHz.)
14
2005-09-28