TC94A04AFG Datasheet, PDF (28/42 Pages) Toshiba Semiconductor – 1 chip Audio Digital Processor

4.2 Boot ROM Format
The following shows the breakdown of the 18 bits.
TC94A04AFG/AFDG
00 Data that are being sent
01 Command
10 Final data (after the data are sent, the CS signal set to “H”).
11 Jump address (jump to any address in the boot-ROM)
17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
(MSB)
(LSB)
000h 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 All ‘0’
001h 11
Address
JMP
002h 11
Address
JMP
003h 01
CMD
CMD
004h 10
Data
Data (last)
005h 01
CMD
CMD
006h 00
Data
Data (cont)
007h 00
Data
Data (cont)
008h 00
Data
Data (cont)
009h 00
Data
Data (cont)
00Ah 10
Data
Data (last)
00Bh 11
Address
JMP 1FFh
1FFh 11
Address
JMP 1FFh
Figure 2 Boot ROM Format and Example
Note 5: Boot mode completes when the address reaches 1FFh, the maximum value. Therefore, for the final address
(1FFh), write JMP 1FFh (data = 301FFh).
Note 6: For the head address (000h), write (00000).
Note 7: Please do not set a command of fs synchronous taking in to the address: 1FEh
(RUN-MUTE/IFF/DE-EMPH/DAC-LR/DAC-CS etc.).
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2005-09-28