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TC94A04AFG Datasheet, PDF (10/42 Pages) Toshiba Semiconductor – 1 chip Audio Digital Processor
2.1.3 Setting RAM (ACMP mode)
TC94A04AFG/AFDG
CS
IFCK
IFDI
C7 C5 C3 C1 A15 A13 A11 A9 A7 A5 A3 A1
Don’t care
C6 C4 C2 C0 A14 A12 A10 A8 A6 A4 A2 A0
D15 D13 D11 D9 D7 D5 D3 D1
D14 D12 D10 D8 D6 D4 D2 D0
D1
D0
Don’t care
Cn: COMMAND
An: ADDRESS
Dn: Data
In ACMP mode, the TC94A04AFG/AFDG does not write data directly to coefficient RAM (CRAM) or offset RAM (OFRAM). In this mode, data must be written
to the interface buffer RAM (IFB-RAM). Then, all the data are updated together in a period of 1 fs.
For example, if a signal flow filter is designed as in the following diagram, unless the K1 to K5 data are batch-updated, the circuit may resonate. The same
applies to the K6 to K10 data.
Using ACMP mode can reduce the noise caused by updating coefficients while the TC94A04AFG/AFDG is operating.
IFB-RAM is 32-word memory. Therefore, data can be updated at one time in units of up to 32-words.
The length of the data field is 2 × n bytes, where n <= 32.
In addition, operation at the time of transmitting other commands, before package rewriting of the data by ACMP mode was completed cannot be guaranteed.
Please set up again after initializing by RST terminal or the initialization command.
K1
+
K2
K4
K6
+
K7
K9
MCU-I/F
IFB-RAM
CRAM
K3
K5
K8 K10
Write one by one・・・
Update for 1 fs
10
2005-09-28