HD3SS3220_15 Datasheet, PDF (8/43 Pages) Texas Instruments – HD3SS3220 USB Type-C DRP Port Controller with SuperSpeed 2:1 MUX

HD3SS3220
SLLSES1 – DECEMBER 2015
6.6 Timing Requirements
I2C (SDA, SCL)
t_SU:DAT
t_SU;STA
t_HD,STA
t_SU:STO
t_BUF
f_SCL
t_r
t_f
SS MUX
Data setup time
Set-up time, SCL to start condition
Hold time,(repeated) start condition to SCL
Set up time for STOP condition
Bus free time between a STOP and START condition
SCL clock frequency; I²C mode for local I²C control
Rise time of both SDA and SCL signals
Fall time of both SDA and SCL signals
t_PD
t_{SW_ON}
t_{SW_OFF}
t_{SK_INTRA}
t_{SK_INTER}
Switch propagation delay See Figure 3
Switching time DIR-to-Switch ON See Figure 2
Switching time DIR-to-Switch OFF See Figure 2
Intra-pair output skew See Figure 3
Inter-pair output skew See Figure 3
VCC
RSC = 50
Axp
RSC = 50
Axn
www.ti.com
MIN
NOM
MAX UNIT
250
ns
4.7
µs
0.4
µs
0.4
µs
4.7
µs
100
ns
1000
ns
300
ns
80
ps
0.5
µs
0.5
µs
5
ps
20
ps
RL = 50
RL = 50
Bxp/Cxp
Bxn/Cxn
DIR
Figure 1. Test Setup
50%
SEL
50%
VOUT
90%
10%
tSW_ON
tSW_OFF
Figure 2. Switch On and Off Timing Diagram
8
Submit Documentation Feedback
Product Folder Links: HD3SS3220
Copyright © 2015, Texas Instruments Incorporated