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HD3SS3220_15 Datasheet, PDF (13/43 Pages) Texas Instruments – HD3SS3220 USB Type-C DRP Port Controller with SuperSpeed 2:1 MUX
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HD3SS3220
SLLSES1 – DECEMBER 2015
7.3 Feature Description
The HD3SS3220 can be configured as a DFP, UFP, or DRP using the 3-level PORT pin. The PORT pin should
be strapped high to VDD5 using a pull-up resistance to achieve DFP mode, low to GND for UFP mode or left
floating for DRP mode on the PCB. This flexibility allows the HD3SS3220 to be used in a variety of applications.
The HD3SS3220 samples the PORT pin after reset and maintains the desired mode until the HD3SS3220 is
reset again. It shall be static. Table 1 shows the supported features in each mode.
Table 1. Supported Features for HD3SS3220 by Mode
PORT PIN
Supported Features
Port Attach/Detach
Cable Orientation
Current Advertisement
Current Detection
Audio Accessory
Debug Accessory Modes
Active Cable Detection
Try.SRC
Try.SNK
I2C/GPIO
Legacy Cables
VBUS Detection
VCONN
USB 3.1 G1 and G2 SS mux
Adaptive common mode tracking for SS channels
High
DFP Only
√
√
√
√
√
√
√
√
√
√
√
Low
UFP Only
√
√
√
√
√
√
√
√
√
√
NC
DRP
√
√
√(DFP)
√(UFP)
√
√
√(DFP)
√
√
√
√
√(UFP)
√(DFP)
√
√
7.3.1 DFP/Source – Downstream Facing Port
The HD3SS3220 can be configured as a DFP only by pulling the PORT pin high through a resistance to VDD.
The HD3SS3220 device can also be configured as a DFP-only device by changing the MODE_SELECT register
default setting with PORT pin left floating. In DFP mode, the HD3SS3220 constantly presents R(p) on both CC
lines. In this mode, the HD3SS3220 will initially advertise default USB Type-C current. The Type-C current can
be adjusted through CURRENT_MODE pin or I2C if the system wishes to increase the current advertisement.
The HD3SS3220 will adjust the R(p) resistors to match the desired advertisement.
A DFP monitors the voltage level on the CC pins looking for the R(d) termination of a UFP. When a UFP is
detected and HD3SS3220 is in the attached. SRC state, the HD3SS3220 pulls the ID pin low to indicate to the
system the port is attached to a device (UFP). Additionally, when a UFP is detected, the HD3SS3220 supplies
VCONN on the unconnected CC pin if R(a) is also detected.
The following list describes the steps for enabling DFP through I2C:
1. Write a 1'b1 to DISABLE_TERM register (address 0x0A bit 0)
2. Write a 2'b10 to MODE_SELECT register (address 0x0A bits 5:4)
3. Write a 1'b0 to DISABLE_TERM register (address 0x0A bit 0)
When configured as a DFP, the HD3SS3220 can operate with older USB Type-C 1.0 devices except for a USB
Type-C 1.0 DRP device. The HD3SS3220 cannot operate with a USB Type-C 1.0 DRP device. This limitation is
a result of a backwards compatibility problem between USB Type-C 1.1 DFP and a USB Type-C 1.0 DRP.
7.3.2 UFP/Sink – Upstream Facing Port
The HD3SS3220 can be configured as a UFP only by pulling the PORT pin low to GND. In UFP mode, the
HD3SS3220 constantly presents Rd (pull-down resistors) on both CC pins.
Copyright © 2015, Texas Instruments Incorporated
Product Folder Links: HD3SS3220
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