HD3SS3220_15 Datasheet, PDF (32/43 Pages) Texas Instruments – HD3SS3220 USB Type-C DRP Port Controller with SuperSpeed 2:1 MUX

HD3SS3220
SLLSES1 – DECEMBER 2015
www.ti.com
10.1.5 Symmetry in the Differential Pairs
Route all high-speed differential pairs together symmetrically and parallel to each other. Deviating from this
requirement occurs naturally during package escape and when routing to connector pins. These deviations must
be as short as possible and package break-out must occur within 0.25 inches of the package.
Figure 16. Differential Pair Symmetry
10.1.6 Via Discontinuity Mitigation
A via presents a short section of change in geometry to a trace and can appear as a capacitive and/or an
inductive discontinuity. These discontinuities result in reflections and some degradation of a signal as it travels
through the via. Reduce the overall via stub length to minimize the negative impacts of vias (and associated via
stubs).
Because longer via stubs resonate at lower frequencies and increase insertion loss, keep these stubs as short as
possible. In most cases, the stub portion of the via present significantly more signal degradation than the signal
portion of the via. TI recommends keeping via stubs to less than 15 mils. Longer stubs must be back-drilled. For
examples of short and long via lengths, see Figure 17 and Figure 18.
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