HD3SS3220_15 Datasheet, PDF (14/43 Pages) Texas Instruments – HD3SS3220 USB Type-C DRP Port Controller with SuperSpeed 2:1 MUX

HD3SS3220
SLLSES1 – DECEMBER 2015
www.ti.com
In UFP mode, the HD3SS3220 monitors the voltage level at the CC pins for attachment of a DFP and also to
determine Type-C current advertisement by the connected DFP. The HD3SS3220 will debounce the CC pins and
wait for VBUS detection before successful attachment. As a UFP, the HD3SS3220 will detect and communicate
the DFP’s advertised current level to the system through the OUT1 and OUT2 pins if in GPIO mode or through
the I2C CURRENT_MODE_DETECT register once in the Attached.SNK state.
The following list describes the steps for enabling DFP through I²C:
1. Write a 1'b1 to DISABLE_TERM register (address 0x0A bit 0)
2. Write a 2'b10 to MODE_SELECT register (address 0x0A bits 5:4)
3. Write a 1'b0 to DISABLE_TERM register (address 0x0A bit 0)
7.3.3 DRP – Dual Role Port
The HD3SS3220 can be configured to operate as DRP when the PORT pin is left floating on the PCB. In DRP
mode, the HD3SS3220 toggles between presenting as a DFP (Rp on both CC pins) and presenting as a UFP
(Rd on both CC pins according to USB Type-C specification.
When presenting as a DFP, the HD3SS3220 monitors the voltage level on the CC pins looking for the R_(d)
termination of a UFP. When a UFP is detected and HD3SS3220 is in the attached. SRC state, the HD3SS3220
pulls the ID pin low to indicate to the system the port is attached to a sink (UFP). Additionally, when a UFP is
detected, the HD3SS3220 supplies VCONN on the unconnected CC pin if Ra is also detected. In DFP mode, the
HD3SS3220 will initially advertise default USB Type-C current. The Type-C current can be adjusted through I²C
if the system wishes to increase the amount advertised. HD3SS3220 will adjust the R_(p) resistors to match the
desired Type-C current advertisement.
When presenting as a UFP, the HD3SS3220 monitors the CC pins for the voltage level corresponding to the
Type-C current advertisement by the connected DFP. The HD3SS3220 will debounce the CC pins and wait for
VBUS detection before successfully attaching. As a UFP, the HD3SS3220 detects and communicate the DFP
advertised current level to the system through the OUT1 and OUT2 pins if in GPIO mode or through the I2C
CURRENT_MODE_DETECT register once in the attached.SNK state.
The HD3SS3220 supports two optional Type-C DRP features called Try.SRC and Try.SNK. Products supporting
dual-role functionality may have a requirement to be a source (DFP) or a sink (UFP) when connected to another
dual-role capable product. For example, a dual-role capable notebook can be used as a source when connected
to a tablet, or a cell phone could be a sink when connected to a notebook or tablet. When standard DRP
products (products which don’t support either Try.SRC or Try.SNK) are connected together, the role (UFP or
DFP) outcome is not predetermined. These two optional DRP features provide a means for dual-role capable
products to connect to another dual-role capable product in the role desired. Try.SRC and Try.SNK are only
available when HD3SS3220 is configured in I²C mode. When operating in GPIO mode, the HD3SS3220 will
always operate as a standard DRP.
The Try.SRC feature of the HD3SS3220 device provides a means for a DRP product to connect as a DFP when
connected to another DRP product that doesn’t implement Try.SRC. When two products which implement
Try.SRC are connected together, the role outcome of either UFP or DFP is the same as a standard DRP.
Try.SRC is enabled by changing I²C register SOURCE_PREF to 2’b11. Once the register is changed to 2’b11,
the HD3SS3220 will always attempt to connect as a DFP when attached to another DRP capable device.
7.3.4 Cable Orientation and Mux Control
The HD3SS3220 detects the cable orientation by monitoring the voltage on the CC pins. When a voltage level
within the proper threshold is detected on CC1, the DIR pin is pulled low. When a voltage level within the proper
threshold is detected on CC2, the DIR is high. The DIR pin is an open drain output and a pull-up resistor must be
installed. The cable orientation status is also be communicated by I²C for HD3SS3220. The device also controls
the integrated SS mux to switch appropriate SS signals pairs (RX1/TX1 or RX2/TX2).
7.3.5 Type-C Current Mode
Once a valid cable detection and attach have been completed, the DFP has the option to advertise the level of
Type-C current a UFP can sink. The default current advertisement for HD3SS3220 can be configured using
CURRENT_MODE pin or I2C CURRENT_MODE_ADVERTISE register. When a different than default current is
chosen, the device adjusts the R_(p) resistors for the specified current level.
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