HD3SS3220_15 Datasheet, PDF (19/43 Pages) Texas Instruments – HD3SS3220 USB Type-C DRP Port Controller with SuperSpeed 2:1 MUX

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7.6 Register Maps
OFFSET
0x07 through 0x00
0x08
0x09
0x0A
0xA0
HD3SS3220
SLLSES1 – DECEMBER 2015
Table 6. CSR Registers
RESET
[0x00, 0x54, 0x55, 0x53, 0x42,
0x33, 0x32, 0x32]
0x00
REGISTER NAME
Device Identification
Connection Status
0x20
Connection Status and Control
0x00
0x02
General Control
Device Revision
SECTION
Device Identification Register
Connection Status Register
Connection Status and Control
Register
General Control Register
Device Revision Register
7.6.1 Device Identification Register (offset = 0x07 through 0x00) [reset = 0x00, 0x54, 0x55, 0x53, 0x42,
0x33, 0x32, 0x32]
Figure 5. Device Identification Register
7
6
5
4
3
2
1
0
DEVICE_ID
R
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit Field
7:0 DEVICE_ID
Table 7. Device Identification Register Field Descriptions
Type
R
Reset
0x00
Description
For the HD3SS3220 device these fields return a string of ASCII
characters returning HD3SS3220 addresses:
0x07 - 0x00 = {0x00, 0x54, 0x55, 0x53, 0x42, 0x33, 0x32, 0x32}
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