5962-0924001VXC Datasheet, PDF (8/46 Pages) Texas Instruments – 12-Bit, 1-GSPS Analog-to-Digital Converter

ADS5400-SP
SLAS669C – SEPTEMBER 2010 – REVISED AUGUST 2012
www.ti.com
INTERLEAVING ADJUSTMENTS
Typical values at T_A = 25°C, Min and Max values over full temperature range T_MIN = –55°C to T_MAX = 125°C,
sampling rate = 1 GSPS, 50% clock duty cycle, AVDD5 = 5 V, AVDD3 = 3.3 V, DVDD3 = 3.3 V, and 1.5 V_PP differential clock
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
OFFSET ADJUSTMENTS
Resolution
9
Bits
DNL
LSB magnitude
Differential linearity error
at full scale range of 2V_PP
120
-2.5
µV
2.5 LSB
INL
Integral Non-Linearity error
-3
3 LSB
Recommended Min Offset
Setting
Recommended Max Offset
Setting
from default offset value, to maintain AC
performance
-8
mV
8
mV
GAIN ADJUSTMENTS
Resolution
12
Bits
LSB magnitude
120
µV
DNL
Differential linearity error
-4
-1.2,
+0.5
4 LSB
INL
Integral Non-Linearity error
-8 -2, +1
8 LSB
Min Gain Setting
Max Gain Setting
INPUT CLOCK FINE PHASE ADJUSTMENT
1.52
V_PP
2
V_PP
Resolution
6
Bits
LSB magnitude
116
fs
DNL
Differential linearity error
-2
2.5 LSB
INL
Integral Non-Linearity error
-2.5
4 LSB
Max Fine Clock Skew setting
7.4
ps
INPUT CLOCK COARSE PHASE ADJUSTMENT
Resolution
5
Bits
LSB magnitude
2.4
ps
DNL
Differential linearity error
-1
1 LSB
INL
Integral Non-Linearity error
-1
5 LSB
Max Coarse Clock Skew
setting
73
ps
8
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