5962-0924001VXC Datasheet, PDF (22/46 Pages) Texas Instruments – 12-Bit, 1-GSPS Analog-to-Digital Converter

ADS5400-SP
SLAS669C – SEPTEMBER 2010 – REVISED AUGUST 2012
BIT <5>
0
1
RESERVED
set to 1 if writing this register
BIT <6>
0
1
Powerdown
device active
device in low power mode (sleep mode)
BIT <7>
0
1
Temperature Sensor
temperature sensor inactive
temperature sensor active, independent of powerdown bit in Bit<6>,
allows reading of temp sensor while the rest of the ADC is in sleep
mode
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Address (hex)
0x06
Defaults
Table 12. Serial Register 0x06 (Read or Write)
BIT 7
BIT 6
Data output mode
0
0
BIT 5
BIT 4
LVDS termination
0
0
BIT 3
BIT 2
LVDS current
0
1
BIT 1
BIT 0
Force LVDS outputs
0
0
BIT <0:1>
00 and 01
10
11
BIT <3:2>
00
01
10
11
BIT <5:4>
00 and 01
10
11
BIT <7:6>
00
01
10
11
Force LVDS outputs
normal operating mode (LVDS is outputting sampled data bits)
forces the LVDS outputs to all logic zeros (data and clock out) - for
level check
forces the LVDS outputs to all logic ones (data and clock out) - for
level check
Set LVDS output current
2.5mA
3.5mA (default)
4.5mA
5.5mA
Set Internal LVDS termination differential resistor (for LVDS
outputs only)
no internal termination
internal 200Ω resistor selected
internal 100Ω resistor selected
Control Data Output Mode
normal mode (LVDS is outputting sampled data bits)
scrambled output mode (D11:D1 is XOR'd with D0)
output data is replaced with PRBS test pattern (7-bit sequence)
output data is replaced with toggling test pattern (all 1s, then all 0s,
then all 1s, etc.....on all bits)
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