DS90UH949-Q1 Datasheet, PDF (69/87 Pages) Texas Instruments – 1080p HDMI to FPD-Link III Bridge Serializer with HDCP

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DS90UH949-Q1
SNLS453 – NOVEMBER 2014
Register Maps (continued)
ADD
(dec)
199
200
ADD
(hex)
0xC7
Register Name
ISR
Bit(s)
7
6
5
4
3
2
1
0
0xC8 NVM_CTL
7
6
5
4:3
2
1
0
206
0xCE BLUE_SCREEN 7:0
224
0xE0 HDCP_DBG_ALI 7:0
AS
226
0xE2 HDCP_CFG_ALI 7:0
AS
227
0xE3 HDCP_CTL_ALI 7:0
AS
Table 10. Serial Control Bus Registers (continued)
Register
Type
R
R
R
R
R
R
R
R
R
R
RW
RW
RW
RW
RW
R
Default
(hex)
0x00
0x00
0x00
0xFF
Function
Description
IS_IND_ACC Interrupt on Indirect Access Complete: Indirect Register Access has completed.
IS_RXDET_IN Interrupt on Receiver Detect interrupt: A downstream receiver has been detected. If
T
HDCP_CFG:RX_DET_SEL is set to a 1, the interrupt will wait for Receiver Lock Detect.
IS_RX_INT
Interrupt on Receiver interrupt: Receiver has indicated an interrupt request from down-
stream device.
IS_LIST_RDY Interrupt on KSV List Ready: The KSV list is ready for reading by the controller.
IS_KSV_RDY Interrupt on KSV Ready: The Receiver KSV is ready for reading by the controller.
IS_AUTH_FAI Interrupt on Authentication Failure: Authentication failure or loss of authentication has
L
occurred.
IS_AUTH_PAS Interrupt on Authentication Pass: Authentication has completed successfully.
S
INT
Global Interrupt: Set if any enabled interrupt is indicated.
NVM_PASS
NVM Verify pass: This bit indicates the completion status of the NVM verification process.
This bit is valid only when NVM_DONE is asserted.
0: NVM Verify failed.
1: NVM Verify passed.
NVM_DONE NVM Verify done: This bit indicates that the NVM Verifcation has completed.
NVM_PARALL
EL
NVM Parallel Load Enable: Setting this bit enables external parallel data to be written to
NVM SRAM. Byte data and a memory clock are brought in on the R[7:0] and G[0] pins
respectively. In this mode of operation NVM_DATA[0] acts as a memory enable to enable
writes to the NVM SRAM.
Reserved.
NVM_VFY
NVM Verify: Setting this bit will enable a verification of the NVM contents. This is done by
reading all NVM keys, computing a SHA-1 hash value, and verifying against the SHA-1
hash stored in NVM. This bit will be cleared upon completion of the NVM Verification.
NVM_PROG NVM Program: Setting this bit to a 1 allows programming of the NVM memory from the
NVM SRAM.
NVM_PROG_ NVM Program Enable: Set to a 1 to allow erase or programming of NVM.
EN
BLUE_SCREE Blue Screen Data Value: Provides the 8-bit data value sent on the Blue channel when the
N_VAL
HDCP Transmitter is sending a blue screen.
HDCP_DBG Read-only alias of HDCP_DBG register.
R
HDCP_CFG Read-only alias of HDCP_CFG register.
R
HDCP_CTL Read-only alias of HDCP_CTL register.
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