DS90UB929-Q1 Datasheet, PDF (38/71 Pages) Texas Instruments – 720p HDMI to FPD-Link III Bridge Serializer

DS90UB929-Q1
SNLS457 – NOVEMBER 2014
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Register Maps (continued)
ADD
(dec)
18
ADD
(hex)
0x12
Register Name
Data Path
Control
Bit(s)
7
6
5
4
3
2
1
0
19
0x13 General Purpose 7
Control
6:4
3
2:0
Table 8. Serial Control Bus Registers (continued)
Register
Type
RW
RW
RW
RW
RW
RW
RW
R
R
R
R
Default
(hex)
0x00
0x88
Function
Description
Pass RGB
DE Polarity
I2S Repeater
Regen
I2S Channel B
Enable
Override
18-Bit Video
Select
I2S Transport
Select
I2S Channel B
Enable
MODE_SEL1
Done
MODE_SEL1
Decode
MODE_SEL0
Done
MODE_SEL0
Decode
Reserved.
Setting this bit causes RGB data to be sent independent of DE. However, setting this bit
blocks packetized audio. This bit does not need to be set in UB serializers.
0: Normal operation.
1: Pass RGB independent of DE.
This bit indicates the polarity of the DE (Data Enable) signal.
0: DE is positive (active high, idle low).
1: DE is inverted (active low, idle high).
Regenerate I2S data from Repeater I2S pins.
0: Repeater pass through I2S from video pins (default).
1: Repeater regenerate I2S from I2S pins.
I2S Channel B Enable Override.
0: Disable I2S Channel B override.
1: Set I2S Channel B Enable from 0x12[0].
0: Select 24-bit video mode.
1: Select 18-bit video mode.
Select I2S transport mode:
0: Enable I2S Data Island transport (default).
1: Enable I2S Data Forward Channel Frame transport.
I2S Channel B Enable.
0: I2S Channel B disabled.
1: Enable I2S Channel B on B1 input.
Note that in a repeater, this bit may be overridden by the in-band I2S mode detection.
Indicates MODE_SEL1 value has stabilized and has been latched.
Returns the 3-bit decode of the MODE_SEL1 pin.
Indicates MODE_SEL0 value has stabilized and has been latched.
Returns the 3-bit decode of the MODE_SEL0 pin.
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