DS90UB929-Q1 Datasheet, PDF (20/71 Pages) Texas Instruments – 720p HDMI to FPD-Link III Bridge Serializer

DS90UB929-Q1
SNLS457 – NOVEMBER 2014
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Feature Description (continued)
The device supports TMDS clocks in the range of 25 MHz to 96 MHz over one lane. The FPD-Link III serial
stream rate is 3.36 Gbps maximum (875 Mbps minimum) .
8.3.9 Back Channel Data Transfer
The Backward Channel provides bidirectional communication between the display and host processor. The
information is carried from the deserializer to the serializer as serial frames. The back channel control data is
transferred over both serial links along with the high-speed forward data, DC balance coding and embedded
clock information. This architecture provides a backward path across the serial link together with a high speed
forward channel. The back channel contains the I2C, CRC and 4 bits of standard GPIO information with 5, 10, or
20 Mbps line rate (configured by the compatible deserializer).
8.3.10 Power Down (PDB)
The Serializer has a PDB input pin to ENABLE or POWER DOWN the device. This pin may be controlled by an
external device, or through V_DDIO, where V_DDIO = 1.71V to 1.89V. To save power, disable the link when the
display is not needed (PDB = LOW). Ensure that this pin is not driven HIGH before all power supplies have
reached final levels. When PDB is driven low, ensure that the pin is driven to 0V for at least 3ms before releasing
or driving high. In the case where PDB is pulled up to V_DDIO directly, a 10kΩ pull-up resistor and a >10µF
capacitor to ground are required (See Power Up Requirements And PDB Pin).
Toggling PDB low will POWER DOWN the device and RESET all control registers to default. During this time,
PDB must be held low for a minimum of 3ms before going high again.
8.3.11 Serial Link Fault Detect
The DS90UB929-Q1 can detect fault conditions in the FPD-Link III interconnect. If a fault condition occurs, the
Link Detect Status is 0 (cable is not detected) on bit 0 of address 0x0C (Table 8). The DS90UB929-Q1 will detect
any of the following conditions:
1. Cable open
2. “+” to “-” short
3. ”+” to GND short
4. ”-” to GND short
5. ”+” to battery short
6. ”-” to battery short
7. Cable is linked incorrectly (DOUT+/DOUT- connections reversed)
Note: The device will detect any of the above conditions, but does not report specifically which one has occurred.
8.3.12 Interrupt Pin (INTB)
The INTB pin is an active low interrupt output pin that acts as an interrupt for various local and remote interrupt
conditions (see registers 0xC6 and 0xC7 of Register Maps). For the remote interrupt condition, the INTB pin
works in conjunction with the INTB_IN pin on the deserializer. This interrupt signal, when configured, will
propagate from the deserializer to the serializer.
1. On the Serializer, set register 0xC6[5] = 1 and 0xC6[0] = 1
2. Deserializer INTB_IN pin is set LOW by some downstream device.
3. Serializer pulls INTB pin LOW. The signal is active LOW, so a LOW indicates an interrupt condition.
4. External controller detects INTB = LOW; to determine interrupt source, read ISR register.
5. A read to ISR will clear the interrupt at the Serializer, releasing INTB.
6. The external controller typically must then access the remote device to determine downstream interrupt
source and clear the interrupt driving the Deserializer INTB_IN. This would be when the downstream device
releases the INTB_IN pin on the Deserializer. The system is now ready to return to step (2) at next falling
edge of INTB_IN.
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