LMG3410 Datasheet, PDF (3/33 Pages) Texas Instruments – 600-V 12-A Single Channel GaN Power Stage

www.ti.com
5 Pin Configuration and Functions
RWH (QFN) PACKAGE
32 PINS
(Top View)
DRAIN
LMG3410
SNOSD10A – APRIL 2016 – REVISED JUNE 2016
12
32 FAULT
13
31 IN
14
30 RDRV
15
29 LPM
16
28 BBSW
SOURCE
NAME
BBSW
DRAIN
FAULT
GND
IN
LDO5V
LPM
SOURCE
RDRV
VDD
VNEG
NC
PAD
PIN
NO.
28
1-11
32
24
31
25
29
12 to 16, 18 to
23
30
27
26
17
GND
I/O ⁽¹⁾
P
P
O
G
I
P
I
P
I
P
P
—
P
Pin Functions
DESCRIPTION
Buck-boost converter switch pin. Connect an inductor from this point to GND.
Power transistor drain
Fault output, push-pull, active low
Signal ground reference and kelvin source; connected to source internally
CMOS-compatible non-inverting gate drive input
5-V LDO output for digital isolator, generated internally with linear regulator.
Enables low-power-mode by pulling the pin to ground
Power transistor source, die-attach pad, thermal sink
Drive strength selection pin. Connect a resistor from this pin to ground to set the turn-on drive
strength to control slew rate
12-V power input, relative to GND. Supplies 5-V rail and gate drive supply.
Negative supply output; bypass to GND with 2.2-µF capacitor.
Not connected, Connect to source or leave floating
Thermal Pad; tie to source with multiple vias
(1) I = Input, O = Output, G = Ground, P = Power
Copyright © 2016, Texas Instruments Incorporated
Product Folder Links: LMG3410
Submit Documentation Feedback
3