LMG3410 Datasheet, PDF (21/33 Pages) Texas Instruments – 600-V 12-A Single Channel GaN Power Stage

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LMG3410
SNOSD10A – APRIL 2016 – REVISED JUNE 2016
Layout Guidelines (continued)
11.1.5 Signal Integrity
The control signals to the LMG3410 must be protected from the high dv/dt that the GaN power stage produces.
Coupling between the control signals and the drain may cause circuit instability and potential destruction. Route
the control signals (IN, FAULT and LPM) over a ground plane located on an adjacent layer. For example, in the
layout in Figure 16, all the signals are routed on the top layer directly over the GND plane on the first inner
copper layer.
The signals for the high-side device are often particularly vulnerable. Coupling between these signals and system
ground planes could cause issues in the circuit. Keep the traces associated with the control signals away from
drain copper. For the high-side level shifter, ensure no copper from either the input or output side extends
beneath the isolator or the device's CMTI may be compromised.
11.1.6 High-Voltage Spacing
Circuits using the LMG3410 involve high voltage, potentially up to 600V. When laying out circuits using the
LMG3410, understand the creepage and clearance requirements in your application and how they apply to the
power stage. Functional (or working) isolation is required between the source and drain of each transistor, and
between the high-voltage power supply and ground. Functional isolation or perhaps stronger isolation (such as
reinforced isolation) may be required between the input circuitry to the LMG3410 and the power controller.
Choose signal isolators and PCB spacing (creepage and clearance) distances which meet your isolation
requirements.
If a heatsink is used to manage thermal dissipation of the LMG3410, ensure necessary electrical isolation and
mechanical spacing is maintained between the heatsink and the PCB.
11.1.7 Thermal Recommendations
LMG3410 may be used in applications with significant power dissipation, for example, hard-switched power
converters. In these converters, cooling using just the PCB may not be sufficient to keep the part at a reasonable
temperature. To improve the thermal dissipation of the part, TI recommends a heatsink is connected to the back
of the PCB to extract additional heat. Using power planes and numerous thermal vias, the heat dissipated in the
LMG3410(s) can be spread out in the PCB and effectively passed to the other side of the PCB. A heat sink can
be applied to bare areas on the back of the PCB using an adhesive thermal interface material (TIM). The
soldermask from the back of the board underneath the heatsink can be removed for more effective heat removal.
Please refer to the High Voltage Half Bridge Design Guide for LMG3410 Smart GaN FET application note for
more recommendations and performance data on thermal layouts.
11.2 Layout Example
Correct layout of the LMG3410 and its surrounding components is essential for correct operation. The layout
shown here reflects the power stage schematic in Figure 11. It may be possible to obtain acceptable
performance with alternate layout schemes, however this layout has been shown to produce good results and is
intended as a guideline.
Copyright © 2016, Texas Instruments Incorporated
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