LMG3410 Datasheet, PDF (17/33 Pages) Texas Instruments – 600-V 12-A Single Channel GaN Power Stage

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LMG3410
SNOSD10A – APRIL 2016 – REVISED JUNE 2016
9.3 Do's and Don'ts
The successful use of GaN devices in general and the LMG3410 in particular depends on proper use of the
device. When using the LMG3410, DO:
• Read and fully understand the datasheet, including the application notes and layout recommendations
• Use a four-layer board and place the return power path on an inner layer to minimize power-loop inductance
• Use small, surface-mount bypass and bus capacitors to minimize parasitic inductance
• Use the proper size decoupling capacitors and locate them close to the IC as described in the Layout
Guidelines section
• Use a signal isolator to supply the input signal for the low side device. If not, ensure the signal source is
connected to the signal GND plane which is tied to the power source only at the LMG3410 IC
• Use the FAULT pin to determine power-up state and to detect over-current and over-temperature events and
safely shut off the converter.
To avoid issues in your system when using the LMG3410, DON'T:
• Use a single-layer or two-layer PCB for the LMG3410 as the power-loop and bypass capacitor inductances
will be excessive and prevent proper operation of the IC
• Reduce the bypass capacitor values below the recommended values
• Allow the device to experience drain transients above 600 V as they may damage the device
• Drive the IC from a controller with a separate ground connection than the GND pin of the IC
• Allow significant third-quadrant conduction when the device is OFF or unpowered, which may cause
overheating
• Ignore the FAULT pin output.
Copyright © 2016, Texas Instruments Incorporated
Product Folder Links: LMG3410
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