LMG3410 Datasheet, PDF (15/33 Pages) Texas Instruments – 600-V 12-A Single Channel GaN Power Stage

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LMG3410
SNOSD10A – APRIL 2016 – REVISED JUNE 2016
Typical Application (continued)
9.2.1 Design Requirements
This design example is for a hard-switched boost converter which is representative of PFC applications. The
system parameters considered are as follows.
DESIGN PARAMETER
Input Voltage
Output Voltage
Input (Inductor) Current
Switching Frequency
Table 1. Design Parameters
EXAMPLE VALUE
200 VDC
400 VDC
5A
100 kHz
9.2.2 Detailed Design Procedure
In high-voltage power converters, correct circuit design and PCB layout is essential to obtaining a high-
performance and even functional power converter. While the general procedure for designing a power converter
is out of the scope of this document, this datasheet describes how to utilize the LMG3410 to build efficient, well-
behaved power converters.
9.2.2.1 Slew Rate Selection
The LMG3410 supports slew rate adjustment through connecting a resistor from RDRV to GND. The choice of
RDRV will control the slew rate of the drain voltage of the device between approximately 30 V/ns and 100 V/ns.
The slew rate adjustment is used to control the following aspects of the power stage:
• Switching loss in a hard-switched converter
• Radiated and conducted EMI generated by the switching stage
• Interference elsewhere in the circuit coupled from the switch node
• Voltage overshoot and ringing on the switch node due to power loop inductance and other parasitics
When increasing the slew rate, the switching power loss will decrease, as the portion of the switching period
where the switch simultaneous conducts high current while blocking high voltage is decreased. However, by
increasing the slew rate of the device, the other three aspects of the power stage get worse. Following the
design recommendations in this datasheet will help mitigate the system-related challenges related to high slew
rate. Ultimately, it is up to the power designer to ensure the chosen slew rate provides the best performance in
his or her end application.
9.2.2.1.1 Startup and Slew Rate with Bootstrap High-side Supply
Using a bootstrap supply for the high-side LMG3410 places additional constraints on the startup of the circuit.
Before the high-side LMG3410 functions correctly, its VDD, LDO5V and VNEG power supplies must start up and
be functional. Prior to the device powering up, the GaN device operates in cascode mode with reduced
performance. In particular, under high drain slew rate (dv/dt), the transistor can conduct to a small extent and
cause additional power dissipation. The correct startup procedure for a bootstrap-supplied half-bridge depends
on the circuit used.
In a buck converter without pre-bias, where the initial output voltage is zero, the startup procedure is
straightforward. In this case, before switching begins, turn on the low-side device to allow the high-side bootstrap
transistor to charge up. When the FAULT signal goes high, the high-side device has powered up completely, and
normal switching can begin.
In a boost converter or a buck converter with a pre-biased output, it is necessary to operate the circuit in
switching PWM mode while the high-side LMG3410 is powering up. With a boost converter, if the low-side device
is held on, the power inductor current will likely run away and the inductor will saturate. To start up a boost
converter, the duty cycle has to be very low and gradually increase to charge the output to the desired value
without the inductor current reaching saturation. This pulse sequence can be performed open-loop or using a
current-mode controller. This startup mode is standard for boost-type converters.
Copyright © 2016, Texas Instruments Incorporated
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