LMH0031 Datasheet, PDF (29/39 Pages) National Semiconductor (TI) – SMPTE 292M/259M Digital Video Deserializer Descrambler with Video and Ancillary Data FIFOs

LMH0031
www.ti.com
SNLS218A – JANUARY 2006 – REVISED APRIL 2013
Example: Program, via the AD port, I/O port bit 0 as output for the CRC Luma Error bit in the control registers.
1. Set ANC/CTRL to a logic-low.
2. Set RD/WR to a logic-low.
3. Present 00Fh to AD[9:0] as the I/O PIN 0 CONFIG register address.
4. Toggle A_CLK.
5. Present 310h to AD[9:0] as the register data, the bit address of the CRC Luma Error bit in the control
registers.
6. Toggle A_CLK.
Table 6. Control Register Bit, Pin[n] SEL[5:0] Codes for I/O Port Pin Mapping⁽¹⁾
Register Bit
reserved
FF Flag Error
AP Flag Error
ANC Flag Error
CRC Error (SD/HD)
ANC FIFO 90% FULL
SHORT MSG DETECT
FULL MSG AVAIL
SAV
EAV
NSP
CRC Luma Error
CRC Chroma Error
F
V
H
Format[0]
Format[1]
Format[2]
Format[3]
Format[4]
FIFO Full
FIFO Empty
Lock Detect
Pass/Fail
FIFO Overrun
ANC Chksum Error
EDH Force
Test Pattern Select[0]
Test Pattern Select[1]
Test Pattern Select[2]
Test Pattern Select[3]
Test Pattern Select[4]
Test Pattern Select[5]
Pin[n] SEL[5:0] Codes
[5]
[4]
[3]
[2]
[1]
[0]
HEX
0
0
0
0
0
0
00
0
0
0
0
0
1
01
0
0
0
0
1
0
02
0
0
0
0
1
1
03
0
0
0
1
0
0
04
Addresses 05h and 06h are reserved
0
0
0
1
1
1
07
0
0
1
0
0
0
08
0
0
1
0
0
1
09
Addresses 0Ah through 0Ch are reserved
0
0
1
1
0
1
0D
0
0
1
1
1
0
0E
0
0
1
1
1
1
0F
0
1
0
0
0
0
10
0
1
0
0
0
1
11
0
1
0
0
1
0
12
0
1
0
0
1
1
13
0
1
0
1
0
0
14
0
1
0
1
0
1
15
0
1
0
1
1
0
16
0
1
0
1
1
1
17
0
1
1
0
0
0
18
0
1
1
0
0
1
19
0
1
1
0
1
0
1A
0
1
1
0
1
1
1B
0
1
1
1
0
0
1C
0
1
1
1
0
1
1D
0
1
1
1
1
0
1E
0
1
1
1
1
1
1F
1
0
0
0
0
0
20
1
0
0
0
0
1
21
1
0
0
0
1
0
22
1
0
0
0
1
1
23
1
0
0
1
0
0
24
1
0
0
1
0
1
25
1
0
0
1
1
0
26
I/P or
O/P
O/P
O/P
O/P
O/P
O/P
Power-On Status
I/O Port Bit 5
O/P
O/P
O/P
O/P
O/P I/O Port Bit 7
O/P
O/P
O/P
O/P I/O Port Bit 0
O/P I/O Port Bit 1
O/P I/O Port Bit 2
O/P
O/P
O/P
O/P
O/P I/O Port Bit 3 (SD/HD)
O/P
O/P I/O Port Bit 6
O/P I/O Port Bit 4
O/P
O/P
O/P
I/P
I/P
I/P
I/P
I/P
I/P
I/P
(1) Note: All LVCMOS inputs have internal pull-down devices except VCLK and ACLK.
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