LMH0031 Datasheet, PDF (11/39 Pages) National Semiconductor (TI) – SMPTE 292M/259M Digital Video Deserializer Descrambler with Video and Ancillary Data FIFOs

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Timing Diagram
LMH0031
SNLS218A – JANUARY 2006 – REVISED APRIL 2013
VCLK
(ACLK)
90%
10%
AD[9:0]
INPUT DATA
t_r, t_f
DV[19:0]
OUTPUT DATA
AD[9:0]
OUTPUT DATA
50%
t_H
t_S
90%
10%
t_PD
t_PD
90%
t_r, t_f
10%
Device Operation
INTRODUCTION
The LMH0031 SMPTE 292M/259M Digital Video Deserializer/Decoder is used in digital video signal origination
and destination equipment: cameras, video tape recorders, telecines, editors, standards converters, video test
and other equipment. It decodes and converts serial SDTV or HDTV component digital video signals into parallel
format. The LMH0031 decoder/deserializer processes serial digital video (SDV) signals conforming to SMPTE
259M, SMPTE 344M (proposed) or SMPTE 292M and operates at serial data rates of 270 Mbps, 360 Mbps, 540
Mbps, 1.483 Gbps and 1.485 Gbps. Corresponding parallel output data rates are 27.0 MHz, 36.0 MHz, 54.0
MHz, 74.176MHz and 74.25 MHz.
The LMH0031 accepts ECL or LVDS serial data input signals. Outputs signals are compatible with LVCMOS
logic devices.
NOTE
In the following explanations, these logical equivalences are observed: ON ≡ Enabled ≡
Set ≡ True ≡ Logic_1 and OFF ≡ Disabled ≡ Reset ≡ False ≡ Logic_0.
VIDEO DATA PATH
The Serial Data Inputs (SDI) accept serial video data at SMPTE 259M standard definition, SMPTE 344M
(proposed) or SMPTE 292M high-definition data rates. These inputs accept standard ECL or LVDS signal levels
and may be used single-ended or differentially. Inputs may be DC or AC coupled, as required, to devices and
circuits supplying the data. Recommended operating conditions and all input DC and AC voltage and current
specifications shall be observed when designing the input coupling circuits.
For convenience, a reference bias source, pin name R_REF, sets the reference current available from the input
bias source, pin name R_BB. The recommended nominal value of R_REF is 4.75kΩ, 1%. R_BB is provided so that the
SDI inputs may be supplied DC bias voltage via external resistors when the inputs are AC-coupled. The bias
source should be loaded with a resistance to the V_SS supply. The source current available at R_BB is 200µA.
Figure 2 shows a typical input biasing scheme using R_BB and R_REF.
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