LMH0031 Datasheet, PDF (21/39 Pages) National Semiconductor (TI) – SMPTE 292M/259M Digital Video Deserializer Descrambler with Video and Ancillary Data FIFOs

LMH0031
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SNLS218A – JANUARY 2006 – REVISED APRIL 2013
Table 2. Control Register Bit Assignments (continued)
Bit 7
Bit 6
ANC 1 (register address 05h)
ANC ID(7)
ANC ID(6)
ANC 2 (register address 06h)
ANC ID(15)
ANC ID(14)
ANC 3 (register address 07h)
ANC MASK(7) ANC MASK(6)
ANC 4 (register address 08h)
Bit 5
ANC ID(5)
ANC ID(13)
ANC MASK(5)
ANC MASK(15) ANC MASK(14) ANC MASK(13)
ANC 5 (register address 17h)
FIFO EXTRACT FIFO CLOCK
ENABLE
ENABLE
ANC 6 (register address 18h)
ANC FIFO
90% FULL
SHORT MSG
DETECT
FORMAT 0 (register address 0Bh)
FRAMING
MODE
SD ONLY
FORMAT 1 (register address 0Ch)
F
V
TEST 0 (register address 0Dh)
FULL MSG
AVAILABLE
ANC PARITY
MASK
HD ONLY
H
PASS/FAIL
TPG ENABLE
TEST PATTERN
SELECT(5)
VIDEO INFO 0 (register address 0Eh)
DE-DITHER
ENABLE
VERT. DE-
DITHER
ENABLE
VPG FILTER
ENABLE
VIDEO CONTROL 0 (register address 55h)
reserved
EXTERNAL
V_CLK
SYNC DETECT
ENABLE
REFERENCE CLOCK (register address 67h)
reserved
reserved
reserved
MULTI-FUNCTION I/O BUS PIN CONFIGURATION
I/O PIN 0 CONFIG (register address 0Fh)
reserved
reserved
PIN 0 SEL[5]
I/O PIN 1 CONFIG (register address 10h)
reserved
reserved
PIN 1 SEL[5]
I/O PIN 2 CONFIG (register address 11h)
reserved
reserved
PIN 2 SEL[5]
I/O PIN 3 CONFIG (register address 12h)
reserved
reserved
PIN 3 SEL[5]
I/O PIN 4 CONFIG (register address 13h)
reserved
reserved
PIN 4 SEL[5]
I/P PIN 5 CONFIG (register address 14h)
reserved
reserved
PIN 5 SEL[5]
I/O PIN 6 CONFIG (register address 15h)
reserved
reserved
PIN 6 SEL[5]
I/O PIN 7 CONFIG (register address 16h)
reserved
reserved
PIN 7 SEL[5]
Bit 4
ANC ID(4)
ANC ID(12)
ANC MASK(4)
ANC
MASK(12)
reserved
reserved
FORMAT
SET(4)
FORMAT(4)
TEST
PATTERN
SELECT(4)
LOCK
DETECT
LSB CLIP
ENABLE
reserved
PIN 0 SEL[4]
PIN 1 SEL[4]
PIN 2 SEL[4]
PIN 3 SEL[4]
PIN 4 SEL[4]
PIN 5 SEL[4]
PIN 6 SEL[4]
PIN 7 SEL[4]
Bit 3
ANC ID(3)
ANC ID(11)
ANC MASK(3)
ANC
MASK(11)
FIFO FLUSH
STATIC
reserved
FORMAT
SET(3)
FORMAT(3)
TEST
PATTERN
SELECT(3)
EAV
reserved
reserved
PIN 0 SEL[3]
PIN 1 SEL[3]
PIN 2 SEL[3]
PIN 3 SEL[3]
PIN 4 SEL[3]
PIN 5 SEL[3]
PIN 6 SEL[3]
PIN 7 SEL[3]
Bit 2
ANC ID(2)
ANC ID(10)
ANC MASK(2)
ANC
MASK(10)
reserved
reserved
FORMAT
SET(2)
FORMAT(2)
TEST
PATTERN
SELECT(2)
SAV
NRZI ENABLE
INT_OSC EN
PIN 0 SEL[2]
PIN 1 SEL[2]
PIN 2 SEL[2]
PIN 3 SEL[2]
PIN 4 SEL[2]
PIN 5 SEL[2]
PIN 6 SEL[2]
PIN 7 SEL[2]
Bit 1
ANC ID(1)
ANC ID(9)
ANC MASK(1)
ANC MASK(9)
MSG FLUSH
STATIC
reserved
FORMAT
SET(1)
FORMAT(1)
TEST
PATTERN
SELECT(1)
NSP
DE-Scramble
ENABLE
CLK EN
PIN 0 SEL[1]
PIN 1 SEL[1]
PIN 2 SEL[1]
PIN 3 SEL[1]
PIN 4 SEL[1]
PIN 5 SEL[1]
PIN 6 SEL[1]
PIN 7 SEL[1]
Bit 0
ANC ID(0)
ANC ID(8)
ANC MASK(0)
ANC MASK(8)
MSG TRACK
VANC
FORMAT
SET(0)
FORMAT(0)
TEST
PATTERN
SELECT(0)
FRAMING
ENABLE
reserved
reserved
PIN 0 SEL[0]
PIN 1 SEL[0]
PIN 2 SEL[0]
PIN 3 SEL[0]
PIN 4 SEL[0]
PIN 5 SEL[0]
PIN 6 SEL[0]
PIN 7 SEL[0]
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