TL16PC564BLVI_16 Datasheet, PDF (25/35 Pages) Texas Instruments – PCMCIA UNIVERSAL ASYNCHRONOUS RECEIVER TRANSMITTER

Not Recommended For New Designs
TL16PC564BLVI
PCMCIA UNIVERSAL ASYNCHRONOUS RECEIVER TRANSMITTER
PARAMETER MEASUREMENT INFORMATION
SLLS627− SEPTEMBER 2004
tc2
HA(9 −0)
90%
10%
ÎÎÎÎÎÎÎÎÎÎÎÎ _{CE1, CE2 See Note A}
10%
tsu13
tsu8
tsu9
90%
10%
90%
10%
10%^{ÎÎÎÎÎÎÎÎSeeÎÎNotÎÎe AÎÎÎÎ}
th11
OE
90%
90%
tsu11
tw8
trec1
WE
HD(7 −0) IN
See Note B
HD(7 −0) OUT
tdis2
90%
10%
90%
10%
tsu12
90%
10%
Data Input Established
tdis1
90%
ten1
10%
90%
10%
th10
th9
ten2
NOTES: A. The hatched portion may be either high or low.
B. When the data I/O terminal is in the output state, no signals should be applied to HD(7 −0) by the system.
Figure 7. Host CPU Attribute-Memory Write Timing Waveforms (WE Control)
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