TL16PC564BLVI_16 Datasheet, PDF (15/35 Pages) Texas Instruments – PCMCIA UNIVERSAL ASYNCHRONOUS RECEIVER TRANSMITTER

Not Recommended For New Designs
TL16PC564BLVI
PCMCIA UNIVERSAL ASYNCHRONOUS RECEIVER TRANSMITTER
SLLS627− SEPTEMBER 2004
XIN timing requirements over recommended operating free-air temperature range (see Figure 1)
Input frequency
tc1
Cycle time, XIN
tw1
Pulse duration, XIN clock high
tw2
Pulse duration, XIN clock low
NOTE 11: TL16PC564BLVI device tested at VCC = 3 V.
TEST CONDITIONS
VCC = 3.3 V,
VCC = 5 V
VCC = 3.3 V,
VCC = 5 V
VCC = 3.3 V,
VCC = 5 V
VCC = 3.3 V,
VCC = 5 V
See Note 11
See Note 11
See Note 11
See Note 11
MIN MAX UNIT
50
MHz
60
20
ns
16.7
10
ns
8
10
ns
8
clock switching characteristics over recommended operating free-air temperature range (see
Figure 1)
PARAMETER
td1
Delay time, XIN↑ to UARTCLK↑
td2
Delay time, XIN↓ to UARTCLK↓
td3
Delay time, XIN↑ to UARTCLK↓
td4
Delay time, XIN↑ to UARTCLK↑
td5
Delay time, XIN↓ to UARTCLK↑
NOTE 11: TL16PC564BLVI device tested at VCC = 3 V.
TEST CONDITIONS
VCC = 3.3 V,
VCC = 5 V
VCC = 3.3 V,
VCC = 5 V
See Note 11
See Note 11
VCC = 3.3 V,
VCC = 5 V
See Note 11
VCC = 3.3 V,
VCC = 5 V
See Note 11
VCC = 3.3 V,
VCC = 5 V
See Note 11
MIN MAX UNIT
14
ns
8
16
ns
10
19.8
ns
13
20.6
ns
13.5
21
ns
13.8
host CPU I/O read-cycle timing requirements over recommended ranges of operating free-air
temperature and supply voltage (see Figure 2 and Note 12)
MIN MAX
th1 Hold time, HA(9 −0) valid after IORD↑
th2 Hold time, REG↑ valid after IORD↑
tw4 Pulse duration, IORD low
tsu1 Setup time, HA(9 −0) valid before IORD↓
tsu2 Setup time, CEx↓ before IORD↓
th3 Hold time, CEx↑ after IORD↑
th4 Hold time, HD(7 −0) valid after IORD↑
tsu3 Setup time, REG↓ before IORD↓
td6 Delay time, HD(7 −0) valid after IORD↓
20
0
165
70
5
20
0
5
100
NOTE 12: The maximum load on INPACK is one low power shot with 50-pF total load. All timing is measured in nanoseconds.
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
host CPU I/O read-cycle switching characteristics over recommended ranges of operating free-air
temperature and supply voltage (see Figure 2 and Note 11)
PARAMETER
MIN MAX UNIT
td7 Delay time, INPACK↓ after IORD↓
45 ns
td8 Delay time, INPACK↑ after IORD↑
45 ns
NOTE 12: The maximum load on INPACK is one low power Schottky (LSTTL) diode with 50-pF total load. All timing is measured in nanoseconds.
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