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DAC8718 Datasheet, PDF (7/60 Pages) Texas Instruments – Octal, 16-Bit, Low-Power, High-Voltage Output, Serial Input DIGITAL-TO-ANALOG CONVERTER
DAC8718
www.ti.com
SBAS467A – MAY 2009 – REVISED DECEMBER 2009
ELECTRICAL CHARACTERISTICS: Single-Supply
All specifications at TA = TMIN to TMAX, AVDD = +32V, AVSS = 0V, IOVDD = DVDD = +5V, REF-A and REF-B = +5V, gain = 6,
AGND-x = DGND = 0V, data format = straight binary, and OFFSET-A = OFFSET-B = AGND, unless otherwise noted.
DAC8718
PARAMETER
STATIC PERFORMANCE(1)
CONDITIONS
MIN
TYP
MAX
UNIT
Resolution
16
Bits
Linearity error
Measured by line passing through codes 0100h and FFFFh
±4
LSB
Differential linearity error
Measured by line passing through codes 0100h and FFFFh
±1
LSB
Unipolar zero error
Unipolar zero error TC
TA = +25°C, before user calibration, gain = 6, code = 0100h
TA = +25°C, before user calibration, gain = 4, code = 0100h
TA = +25°C, after user calib., gain = 4 or 6, code = 0100h
Gain = 4 or 6, code = 0100h
±10
LSB
±15
LSB
±1
LSB
±0.5
±3 ppm FSR/°C
Gain error
Gain error TC
TA = +25°C, gain = 6
TA = +25°C, gain = 4
Gain = 4 or 6
±10
LSB
±15
LSB
±1
±3 ppm FSR/°C
Full-scale error
Full-scale error TC
TA = +25°C, before user calibration, gain = 6, code = FFFFh
TA = +25°C, before user calibration, gain = 4, code = FFFFh
TA = +25°C, after user calib., gain = 4 or 6, code = FFFFh
Gain = 4 or 6, code = FFFFh
±10
LSB
±15
LSB
±1
LSB
±0.5
±3 ppm FSR/°C
DC crosstalk(2)
Measured channel at code = 8000h, full-scale change on any
other channel
ANALOG OUTPUT (VOUT-0 to VOUT-7)(3)
Voltage output(4)
VREF = +5V
VREF = +1.5V
Output impedance
Code = 8000h
Short-circuit current(5)
0.2
0
0
±8
LSB
+30
V
+9
V
0.5
Ω
mA
Load current
See Figure 84 and Figure 85
±3
mA
Output drift vs time
Capacitive load stability
TA = +25°C, device operating for 500 hours, full-scale output
TA = +25°C, device operating for 1000 hours, full-scale output
3.4
ppm of FSR
4.3
ppm of FSR
500
pF
To 0.03% of FSR, CL = 200pF, RL= 10kΩ, code from 0100h to
FFFFh and FFFFh to 0100h
10
μs
Settling time
To 1 LSB, CL = 200pF, RL = 10kΩ, code from 0100h to FFFFh
and FFFFh to 0100h
15
μs
Slew rate(6)
Power-on delay(7)
Power-down recovery time
Digital-to-analog glitch(8)
To 1 LSB, CL = 200pF, RL = 10kΩ, code from 7F00h to 8100h
and 8100h to 7F00h
From IOVDD ≥ +1.8V and DVDD ≥ +2.7V to CS low
Code from 7FFFh to 8000h and 8000h to 7FFFh
6
μs
6
V/μs
200
μs
90
μs
4
nV-s
Glitch impulse peak amplitude
Channel-to-channel isolation(9)
Code from 7FFFh to 8000h and 8000h to 7FFFh
VREF = 4VPP, f = 1kHz
5
mV
88
dB
(1) Gain = 4 and TC specified by design and characterization.
(2) The DAC outputs are buffered by op amps that share common AVDD and AVSS power supplies. DC crosstalk indicates how much dc
change in one or more channel outputs may occur when the dc load current changes in one channel (because of an update). With
high-impedance loads, the effect is virtually immeasurable. Multiple AVDD and AVSS terminals are provided to minimize dc crosstalk.
(3) Specified by design.
(4) The analog output range of VOUT-0 to VOUT-7 is equal to (6 × VREF) for gain = 6. The maximum value of the analog output must not be
greater than (AVDD – 0.5V). All specifications are for a +32V power supply and a 0V to +30V output, unless otherwise noted.
(5) When the output current is greater than the specification, the current is clamped at the specified maximum value.
(6) Slew rate is measured from 10% to 90% of the transition when the output changes from 0 to full-scale.
(7) Power-on delay is defined as the time from when the supply voltages reach the specified conditions to when CS goes low, for valid
digital communication.
(8) Digital-to-analog glitch is defined as the amount of energy injected into the analog output at the major code transition. It is specified as
the area of the glitch in nV-s. It is measured by toggling the DAC register data between 7FFFh and 8000h in straight binary format.
(9) Channel-to-channel isolation refers to the ratio of the signal amplitude at the output of one DAC channel to the amplitude of the
sinusoidal signal on the reference input of another DAC channel. It is expressed in dB and measured at midscale.
Copyright © 2009, Texas Instruments Incorporated
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