DAC8718 Datasheet, PDF (17/60 Pages) Texas Instruments – Octal, 16-Bit, Low-Power, High-Voltage Output, Serial Input DIGITAL-TO-ANALOG CONVERTER

DAC8718
www.ti.com
SBAS467A – MAY 2009 – REVISED DECEMBER 2009
TIMING CHARACTERISTICS: IOV_DD = +1.8V^(1)(2)(3)(4)
At –40°C to +105°C, DV_DD = +3V/+5V, and IOV_DD = +1.8V, unless otherwise noted.
PARAMETER
MIN
MAX
f_SCLK
t₁
t₂
t₃
t₄
t₅
t₆
t₇
t₈
t₉
t₁₀
t₁₁
t₁₂
t₁₃
t₁₄
Clock frequency
SCLK cycle time
SCLK high time
SCLK low time
CS falling edge to SCLK falling edge setup time
SDI setup time before falling edge of SCLK
SDI hold time after falling edge of SCLK
SCLK falling edge to CS rising edge
CS high time
CS rising edge to LDAC falling edge
LDAC pulse duration
Delay from SCLK rising edge to SDO valid
Delay from CS rising edge to SDO Hi-Z
Delay from CS falling edge to SDO valid
SDI to SDO delay during sleep mode
16.6
60
28
7
28
10
5
10
28
5
10
3
25
15
23
2
25
(1) Specified by design. Not production tested.
(2) Sample tested during the initial release and after any redesign or process changes that may affect these parameters.
(3) All input signals are specified with t_R = t_F = 6ns (10% to 90% of IOV_DD) and timed from a voltage level of IOV_DD/2.
(4) SDO loaded with 10Ω series resistance and 10pF load capacitance for SDO timing specifications, with t_R = t_F ≤ 15ns.
UNIT
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Copyright © 2009, Texas Instruments Incorporated
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