DAC8718 Datasheet, PDF (11/60 Pages) Texas Instruments – Octal, 16-Bit, Low-Power, High-Voltage Output, Serial Input DIGITAL-TO-ANALOG CONVERTER

DAC8718
www.ti.com
PAG PACKAGE
TQFP-64
(TOP VIEW)
PIN CONFIGURATIONS
SBAS467A – MAY 2009 – REVISED DECEMBER 2009
RGZ PACKAGE
QFN-48
(TOP VIEW)
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
AV_DD 1
NC 2
AIN-0 3
V_OUT-3 4
REF-A 5
V_OUT-2 6
V_OUT-1 7
AGND-A 8
AGND-A 9
OFFSET-A 10
V_OUT-0 11
AV_SS 12
NC 13
V_MON 14
NC 15
NC 16
DAC8718
48 AV_DD
47 NC
46 AIN-1
45 V_OUT-4
44 REF-B
43 V_OUT-5
42 V_OUT-6
41 AGND-B
40 AGND-B
39 OFFSET-B
38 V_OUT-7
37 AV_SS
36 NC
35 NC
34 NC
33 NC
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
AV_DD 1
AIN-0 2
V_OUT-3 3
REF-A 4
V_OUT-2 5
V_OUT-1 6
AGND-A 7
AGND-A 8
OFFSET-A 9
V_OUT-0 10
AV_SS 11
V_MON 12
DAC8718
36 AV_DD
35 AIN-1
34 V_OUT-4
33 REF-B
32 V_OUT-5
31 V_OUT-6
30 AGND-B
29 AGND-B
28 OFFSET-B
27 V_OUT-7
26 AV_SS
25 NC
PIN
NAME
AV_DD
AIN-0
V_OUT-3
REF-A
V_OUT-2
V_OUT-1
AGND-A
AGND-A
OFFSET-A
V_OUT-0
AV_SS
V_MON
GPIO-2
CLR
RST
PIN NO.
QFN-48
TQFP-64
1
1
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
14
13
19
14
20
15
21
(1) The thermal pad is internally connected to
the substrate. This pad can be connected
to AV_SS or left floating. Keep the thermal
pad separate from the digital ground, if
possible.
PIN DESCRIPTIONS
I/O
DESCRIPTION
I Positive analog power supply
I Auxiliary analog input 0, directly routed to the analog mux
O DAC-3 output
I
Group A⁽¹⁾ reference input
O DAC-2 output
O DAC-1 output
I Group A analog ground and the ground of REF-A. This pin must be tied to AGND-B and DGND.
I Group A analog ground and the ground of REF-A. This pin must be tied to AGND-B and DGND.
O
OFFSET DAC-A analog output. Must be connected to AGND-A during single power-supply
operation (AV_SS = 0V). This pin is not intended to drive an external load.
O DAC-0 output
I Negative analog power supply
Analog monitor output. This pin is either in Hi-Z status, connected to one of the eight DAC outputs,
O reference buffer outputs, offset DAC outputs, or one of the auxiliary analog inputs, depending on
the content of the Monitor Register. See the Monitor Register, Table 12, for details.
I/O
General-purpose digital input/output 2. This pin is a bidirectional digital input/output, open-drain and
requires an external pull-up resistor. See the GPIO Pins section for details.
Clear input, level triggered. When the CLR pin is logic '0', all V_OUT-X pins connect to AGND-x
I through switches and internal low-impedance. When the CLR pin is logic '1', all V_OUT-X pins
connect to the amplifier outputs.
I
Reset input (active low). Logic low on this pin resets the DAC registers and DACs to the values
defined by the RSTSEL pin. CS must be logic high when RST is active.
(1) Group A consists of DAC-0, DAC-1, DAC-2, and DAC-3. Group B consists of DAC-4, DAC-5, DAC-6, and DAC-7.
Copyright © 2009, Texas Instruments Incorporated
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