AM1806_1005 Datasheet, PDF (66/241 Pages) Texas Instruments – AM1806 ARM Microprocessor

AM1806
SPRS658B – FEBRUARY 2010 – REVISED MAY 2010
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6.4 Reset
6.4.1 Power-On Reset (POR)
A power-on reset (POR) is required to place the device in a known good state after power-up. Power-On
Reset is initiated by bringing RESET and TRST low at the same time. POR sets all of the device internal
logic to its default state. All pins are tri-stated with the exception of RESETOUT which remains active
through the reset sequence. RESETOUT is an output for use by other controllers in the system that
indicates the device is currently in reset.
RTCK is maintained active through a POR.
A summary of the effects of Power-On Reset is given below:
• All internal logic (including emulation logic and the PLL logic) is reset to its default state
• Internal memory is not maintained through a POR
• RESETOUT goes active
• All device pins go to a high-impedance state
• The RTC peripheral is not reset during a POR. A software sequence is required to reset the RTC
A watchdog reset triggers a POR.
6.4.2 Warm Reset
A warm reset provides a limited reset to the device. Warm Reset is initiated by bringing only RESET low
(TRST is maintained high through a warm reset). Warm reset sets certain portions of the device to their
default state while leaving others unaltered. All pins are tri-stated with the exception of RESETOUT which
remains active through the reset sequence. RESETOUT is an output for use by other controllers in the
system that indicates the device is currently in reset.
RTCK is maintained active through a POR.
A summary of the effects of Warm Reset is given below:
• All internal logic (except for the emulation logic and the PLL logic) is reset to its default state
• Internal memory is maintained through a warm reset
• RESETOUT goes active
• All device pins go to a high-impedance state
• The RTC peripheral is not reset during a warm reset. A software sequence is required to reset the
RTC
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Peripheral Information and Electrical Specifications
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