AM1806_1005 Datasheet, PDF (121/241 Pages) Texas Instruments – AM1806 ARM Microprocessor

AM1806
www.ti.com
SPRS658B – FEBRUARY 2010 – REVISED MAY 2010
6.14 Multichannel Audio Serial Port (McASP)
The McASP serial port is specifically designed for multichannel audio applications. Its key features are:
• Flexible clock and frame sync generation logic and on-chip dividers
• Up to sixteen transmit or receive data pins and serializers
• Large number of serial data format options, including:
– TDM Frames with 2 to 32 time slots per frame (periodic) or 1 slot per frame (burst)
– Time slots of 8,12,16, 20, 24, 28, and 32 bits
– First bit delay 0, 1, or 2 clocks
– MSB or LSB first bit order
– Left- or right-aligned data words within time slots
• DIT Mode with 384-bit Channel Status and 384-bit User Data registers
• Extensive error checking and mute generation logic
• All unused pins GPIO-capable
• Transmit & Receive FIFO Buffers allow the McASP to operate at a higher sample rate by making it
more tolerant to DMA latency.
• Dynamic Adjustment of Clock Dividers
– Clock Divider Value may be changed without resetting the McASP
Pins
Function
Peripheral
Configuration
Bus
McASP
DMA Bus
(Dedicated)
GIO
Control
DIT RAM
384 C
384 U
Optional
Transm it
Form atter
Receive Logic
Clock/Fram e Generator
State Machine
Clock Check and
Error Detection
Transm it Logic
Clock/Fram e Generator
State Machine
Serializer 0
Serializer 1
AHCLKRx
ACLKRx
AFSRx
AMUTEINx
AMUTEx
AFSXx
ACLKXx
AHCLKXx
Receive Master Clock
Receive Bit Clock
Receive Left/Right Clock or Fram e Sync
The McASP DOES NOT have a
dedicated AMUTEIN pin.
Transm it Left/R ight C lock or Fram e S ync
Transm it B it C lock
Transm it M aster C lock
AXRx[0]
Transm it/R eceive S erial D ata P in
AXRx[1]
Transm it/R eceive S erial D ata P in
Receive
Form atter
Serializer y
McASP
AXRx[y]
Transm it/R eceive S erial D ata P in
Figure 6-28. McASP Block Diagram
Copyright © 2010, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications 121
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