CC2520_11 Datasheet, PDF (61/133 Pages) Texas Instruments – 2.4 GHZ IEEE 802.15.4/ZIGBEE RF TRANSCEIVER

CC2520 DATASHEET
2.4 GHZ IEEE 802.15.4/ZIGBEE® RF TRANSCEIVER
SWRS068 – DECEMBER 2007
Address
0x3E9
0x3E8
0x3E7
0x3E6
REGISTER / Variable
SRCSHORTPENDEN2
SRCSHORTPENDEN1
SRCSHORTPENDEN0
SRCEXTPENDEN2
0x3E5
0x3E4
SRCEXTPENDEN1
SRCEXTPENDEN0
0x3E3
SRCRESINDEX
0x3E2
0x3E1
0x3E0
SRCRESMASK2
SRCRESMASK1
SRCRESMASK0
0x3DE-0x3DF
0x3DC-0x3DD
0x3DA-0x3DB
0x3D8-0x3D9
short_23
panid_23
short_22
panid_22
ext_11
0x38E-0x38F
0x38C-0x38D
0x38A-0x38B
0x388-0x389
0x386-0x387
0x384-0x385
0x382-0x383
0x380-0x381
short_03
panid_03
short_02
panid_02
short_01
panid_01
short_00
panid_00
ext_01
ext_00
Endian
Description
8 MSBs of the 24-bit mask that enables / disables automatic
pending for each of the 24 short address.
8 LSBs of the 24-bit mask that enables / disables automatic
pending for each of the 24 short address.
8 MSBs of the 24-bit mask that enables / disables automatic
pending for each of the 12 extended addresses. Entry n is
mapped SRCEXTPENDEN[2n]. All SRCEXTPENDEN[2n+1]
bits are don't care.
8 LSBs of the 24-bit mask that enables / disables automatic
pending for each of the 12 extended addresses. Entry n is
mapped SRCEXTPENDEN[2n]. All SRCEXTPENDEN[2n+1]
bits are don't care.
Source address matching result
The bit index of the least significant '1' in SRCRESMASK, or
0x3F when there is no source match.
Upon a match, bit 5 is '0' when the match is on a short address
and '1' when it is on an extended address.
Upon a match, bit 6 is '1' when the conditions for automatic
pending bit in acknowledgment have been met (see the
description of SRCMATCH.AUTOPEND). The bit gives no
indication of whether or not the acknowledgment actually is
transmitted, and does not take the PENDING_OR register bit
and the SACK/SACKPEND/SNACK strobes into account.
24-bit mask that indicates source address match for each
individual entry in the source address table.
Short address matching: When there is a match on entry
panid_n + short_n, bit n will be set in SRCRESMASK.
Extended address matching: When there is a match on entry
ext_n, bits 2n and 2n+1 will be set in SRCRESMASK.
Source address table
LE LE 2 individual short address entries (combination of 16 bit PAN
ID and 16 bit short address) or 1 extended address entry.
LE
LE
LE
-----
LE LE 2 individual short address entries (combination of 16 bit PAN
ID and 16 bit short address) or 1 extended address entry.
LE
LE
LE
LE LE 2 individual short address entries (combination of 16 bit PAN
ID and 16 bit short address) or 1 extended address entry.
LE
LE
LE
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