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CC2520_11 Datasheet, PDF (3/133 Pages) Texas Instruments – 2.4 GHZ IEEE 802.15.4/ZIGBEE RF TRANSCEIVER
CC2520 DATASHEET
2.4 GHZ IEEE 802.15.4/ZIGBEE® RF TRANSCEIVER
SWRS068 – DECEMBER 2007
12.3 Power Up With SRES .................................................................................................... 41
13 Instruction Set ............................................................................................................................ 43
13.1 Definitions ...................................................................................................................... 43
13.2 Instruction Descriptions .................................................................................................. 43
13.3 Instruction Set Summary ................................................................................................ 51
13.4 Status Byte ..................................................................................................................... 53
13.5 Command Strobes ......................................................................................................... 53
13.6 Command Strobe Buffer ................................................................................................ 53
14 Exceptions ................................................................................................................................. 55
14.1 Exceptions on GPIO Pins............................................................................................... 56
14.2 Predefined Exception Channels ..................................................................................... 56
14.3 Binding Exceptions to Instructions (command strobes) ................................................. 57
15 Memory Map .............................................................................................................................. 59
15.1 FREG ............................................................................................................................. 60
15.2 SREG ............................................................................................................................. 60
15.3 TX FIFO ......................................................................................................................... 60
15.4 RX FIFO ......................................................................................................................... 60
15.5 MEM ............................................................................................................................... 60
15.6 Frame Filtering and Source Matching Memory Map ...................................................... 60
16 Frequency and Channel Programming ...................................................................................... 62
17 IEEE 802.15.4-2006 Modulation Format.................................................................................... 63
18 IEEE 802.15.4-2006 Frame Format........................................................................................... 65
18.1 PHY Layer ...................................................................................................................... 65
18.2 MAC Layer ..................................................................................................................... 65
19 Transmit Mode ........................................................................................................................... 67
19.1 TX Control ...................................................................................................................... 67
19.2 TX State Timing ............................................................................................................. 67
19.3 TX FIFO Access ............................................................................................................. 67
19.3.1 Retransmission........................................................................................................... 68
19.3.2 Error Conditions ......................................................................................................... 68
19.4 TX Flow Diagram ........................................................................................................... 69
19.5 Frame Processing .......................................................................................................... 70
19.5.1 Synchronization Header ............................................................................................. 70
19.5.2 Frame Length Field .................................................................................................... 70
19.5.3 Frame Check Sequence............................................................................................. 70
19.6 Exceptions...................................................................................................................... 71
19.7 Clear Channel Assessment............................................................................................ 71
19.8 Output Power Programming........................................................................................... 71
19.9 Tips And Tricks .............................................................................................................. 72
20 Receive Mode ............................................................................................................................ 73
20.1 RX Control...................................................................................................................... 73
20.2 RX State Timing ............................................................................................................. 73
20.3 Frame Processing .......................................................................................................... 73
20.3.1 Synchronization Header And Frame Length Fields.................................................... 74
20.3.2 Frame Filtering ........................................................................................................... 74
20.3.3 Source Address Matching .......................................................................................... 77
20.3.4 Frame Check Sequence............................................................................................. 80
20.3.5 Acknowledgement Transmission................................................................................ 81
20.4 RX FIFO Access ............................................................................................................ 82
20.4.1 Using the FIFO and FIFOP Signals............................................................................ 82
20.4.2 Error Conditions ......................................................................................................... 83
20.5 RSSI ............................................................................................................................... 83
20.6 Link Quality Indication .................................................................................................... 84
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