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CC2520_11 Datasheet, PDF (103/133 Pages) Texas Instruments – 2.4 GHZ IEEE 802.15.4/ZIGBEE RF TRANSCEIVER
CC2520 DATASHEET
2.4 GHZ IEEE 802.15.4/ZIGBEE® RF TRANSCEIVER
SWRS068 – DECEMBER 2007
28.1 Register Settings Update
This section contains a summary of the register settings that need to be updated from their default value.
Note that these values must be written every time CC2520 has been in LPM2 and is being brought back to
active mode.
Table 21: Registers that need update from their default value
Register name
TXPOWER
CCACTRL0
MDMCTRL0
MDMCTRL1
RXCTRL
FSCTRL
FSCAL1
AGCCTRL1
ADCTEST0
ADCTEST1
ADCTEST2
Address
(hex)
030
New value
(hex)
32
036
F8
046
85
047
14
04A
3F
04C
5A
04F
2B
053
11
056
10
057
0E
058
03
Description
Set 0 dBm output power. Use only the values listed in Table
17 in this register.
Raises the CCA threshold from about -108dBm to about -
84 dBm input level.
Makes sync word detection less likely by requiring two zero
symbols before the sync word.
Make it more likely to detect sync by removing the
requirement that both symbols in the SFD must have a
correlation value above the correlation threshold, and make
sync word detection less likely by raising the correlation
threshold.
Adjust currents in RX related analog modules.
Adjust currents in synthesizer.
Adjust currents in VCO.
Adjust target value for AGC control loop.
Tune ADC performance.
Tune ADC performance.
Tune ADC performance.
28.2 Register Access Modes
The “Mode” columns in the tables below show what kind of accesses that are allowed for each bit. Table 22
shows the meaning of the different alternatives.
Mode
R
W
R0
R1
W1
W0
R*
Table 22: Register bits access modes
Description
Read
Write
Read constant zero
Read constant one
Only possible to write one
Only possible to write zero
The value read is not the actual register value, but rather the value seen by the module. This is typically used where a
configuration value may be generated automatically (through calibration, dynamic control etc.) or manually overridden with
a register value. An example structure is shown below for the AGCCTRL2 register.
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